From patchwork Mon May 4 06:20:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprakash Murugesan X-Patchwork-Id: 189307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C934C3A5A9 for ; Mon, 4 May 2020 06:21:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2A94E206B9 for ; Mon, 4 May 2020 06:21:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726955AbgEDGUb (ORCPT ); Mon, 4 May 2020 02:20:31 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:59629 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726906AbgEDGUb (ORCPT ); Mon, 4 May 2020 02:20:31 -0400 Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-01.qualcomm.com with ESMTP; 03 May 2020 23:20:31 -0700 Received: from sivaprak-linux.qualcomm.com ([10.201.3.202]) by ironmsg-SD-alpha.qualcomm.com with ESMTP; 03 May 2020 23:20:28 -0700 Received: by sivaprak-linux.qualcomm.com (Postfix, from userid 459349) id B6D882173A; Mon, 4 May 2020 11:50:26 +0530 (IST) From: Sivaprakash Murugesan To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sivaprakash Murugesan Subject: [PATCH V4 2/8] dt-bindings: clock: Add schema for QCOM IPQ apss pll Date: Mon, 4 May 2020 11:50:18 +0530 Message-Id: <1588573224-3038-3-git-send-email-sivaprak@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1588573224-3038-1-git-send-email-sivaprak@codeaurora.org> References: <1588573224-3038-1-git-send-email-sivaprak@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add dt-binding for apss pll found on QCOM IPQ platforms Signed-off-by: Sivaprakash Murugesan --- .../bindings/clock/qcom,ipq-apsspll.yaml | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml new file mode 100644 index 0000000..dd12ec4 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,ipq-apsspll.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,ipq-apsspll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ APSS PLL Binding + +maintainers: + - Sivaprakash Murugesan + +description: + The APSS PLL is the main clock that feds the CPUs on QCOM IPQ platforms. + It can support frequencies above 1GHz. + +properties: + compatible: + const: qcom,ipq-apss-pll + + reg: + maxItems: 1 + + '#clock-cells': + const: 0 + + clocks: + items: + - description: board XO clock + + clock-names: + items: + - const: xo + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + a53pll_ipq: clock@b116000 { + compatible = "qcom,ipq-apss-pll"; + reg = <0x0b116000 0x40>; + #clock-cells = <0>; + clocks = <&xo>; + clock-names = "xo"; + };