diff mbox series

[v11,9/9] arm64: dts: qcom: msm8916: Add debug unit

Message ID 1495548980-30432-10-git-send-email-leo.yan@linaro.org
State Superseded
Headers show
Series coresight: enable debug module | expand

Commit Message

Leo Yan May 23, 2017, 2:16 p.m. UTC
Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.

Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

Signed-off-by: Leo Yan <leo.yan@linaro.org>

---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

-- 
2.7.4

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Comments

Mathieu Poirier May 23, 2017, 4:31 p.m. UTC | #1
On 23 May 2017 at 08:16, Leo Yan <leo.yan@linaro.org> wrote:
> Add debug unit on Qualcomm msm8916 based platforms, including the

> DragonBoard 410c board.

>

> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>

> Signed-off-by: Leo Yan <leo.yan@linaro.org>


Andy and David,

Would you mind taking a look a this when you have a minute?  If it's
fine with you we can make this go through my tree with the rest of the
driver.

Regards,
Mathieu


> ---

>  arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 ++++++++++++++++++++++++++++++++

>  1 file changed, 32 insertions(+)

>

> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi

> index ab30939..17691ab 100644

> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi

> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi

> @@ -1116,6 +1116,38 @@

>                         };

>                 };

>

> +               debug@850000 {

> +                       compatible = "arm,coresight-cpu-debug","arm,primecell";

> +                       reg = <0x850000 0x1000>;

> +                       clocks = <&rpmcc RPM_QDSS_CLK>;

> +                       clock-names = "apb_pclk";

> +                       cpu = <&CPU0>;

> +               };

> +

> +               debug@852000 {

> +                       compatible = "arm,coresight-cpu-debug","arm,primecell";

> +                       reg = <0x852000 0x1000>;

> +                       clocks = <&rpmcc RPM_QDSS_CLK>;

> +                       clock-names = "apb_pclk";

> +                       cpu = <&CPU1>;

> +               };

> +

> +               debug@854000 {

> +                       compatible = "arm,coresight-cpu-debug","arm,primecell";

> +                       reg = <0x854000 0x1000>;

> +                       clocks = <&rpmcc RPM_QDSS_CLK>;

> +                       clock-names = "apb_pclk";

> +                       cpu = <&CPU2>;

> +               };

> +

> +               debug@856000 {

> +                       compatible = "arm,coresight-cpu-debug","arm,primecell";

> +                       reg = <0x856000 0x1000>;

> +                       clocks = <&rpmcc RPM_QDSS_CLK>;

> +                       clock-names = "apb_pclk";

> +                       cpu = <&CPU3>;

> +               };

> +

>                 etm@85c000 {

>                         compatible = "arm,coresight-etm4x", "arm,primecell";

>                         reg = <0x85c000 0x1000>;

> --

> 2.7.4

>

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diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index ab30939..17691ab 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1116,6 +1116,38 @@ 
 			};
 		};
 
+		debug@850000 {
+			compatible = "arm,coresight-cpu-debug","arm,primecell";
+			reg = <0x850000 0x1000>;
+			clocks = <&rpmcc RPM_QDSS_CLK>;
+			clock-names = "apb_pclk";
+			cpu = <&CPU0>;
+		};
+
+		debug@852000 {
+			compatible = "arm,coresight-cpu-debug","arm,primecell";
+			reg = <0x852000 0x1000>;
+			clocks = <&rpmcc RPM_QDSS_CLK>;
+			clock-names = "apb_pclk";
+			cpu = <&CPU1>;
+		};
+
+		debug@854000 {
+			compatible = "arm,coresight-cpu-debug","arm,primecell";
+			reg = <0x854000 0x1000>;
+			clocks = <&rpmcc RPM_QDSS_CLK>;
+			clock-names = "apb_pclk";
+			cpu = <&CPU2>;
+		};
+
+		debug@856000 {
+			compatible = "arm,coresight-cpu-debug","arm,primecell";
+			reg = <0x856000 0x1000>;
+			clocks = <&rpmcc RPM_QDSS_CLK>;
+			clock-names = "apb_pclk";
+			cpu = <&CPU3>;
+		};
+
 		etm@85c000 {
 			compatible = "arm,coresight-etm4x", "arm,primecell";
 			reg = <0x85c000 0x1000>;