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[209.132.180.67]) by mx.google.com with ESMTP id k7si3301834pag.118.2016.09.08.06.41.43; Thu, 08 Sep 2016 06:41:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934425AbcIHNlm (ORCPT + 8 others); Thu, 8 Sep 2016 09:41:42 -0400 Received: from mail-lf0-f41.google.com ([209.85.215.41]:36353 "EHLO mail-lf0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934219AbcIHNll (ORCPT ); Thu, 8 Sep 2016 09:41:41 -0400 Received: by mail-lf0-f41.google.com with SMTP id g62so21623462lfe.3 for ; Thu, 08 Sep 2016 06:41:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=a8aMhwxMala4XhF3iTFn5f9AoHNE4sZ9yWu7FGAwUxQ=; b=Eq8xmhwKmoi5VNNnV1f4WBVDJ78E76+/Qv/qje+BFmXJN1XAzSxIrDMFoVY4e1+T9P hDGEAwSJZW3SCiPUTGZFkWGxqxbgtohdu0UH0sR8BPdsE09PZrHzKc1VV2PHGH1hc8+j ADs2lhV0OgIzl0AV0WzL1tp5fQYQuroGZkCHU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=a8aMhwxMala4XhF3iTFn5f9AoHNE4sZ9yWu7FGAwUxQ=; b=aiKoif3dOtpGnvASm/Iva6Pk+6c3olQmB1IrVeKN6aReVjvAwCtrtzWdHxIZeR+HlL TaQdmK1I8xqD7D4eKV1p8dp9FyMlEmKFb91SR87QVJyIulP5qUQW+0g4AiQxryimbS7z kUbK/3WIVhyk/f2IMe/Uadrn9cfvvuVilnS8KlOmrj/BV56Af0bimwlsfyBJ+otRGZt8 0GgvFlHop/XPwWWnP+sI4OAof+xZ60MZn0bC8OxDb+DqceN37Ps5wxbn8mJOutKJMhTI MvcxjrA5HKL8wydKDPRQnkzYwLt1D94myc9dG5Q89hqCi6MUOarDGQT9CDvFSbXf/vNX rtfw== X-Gm-Message-State: AE9vXwOy2QkHLjk4LDESDZtGtom5+b64Ln+EsE5+TLVRTQYuyYURLBzcRPf908cqD1nZnygc X-Received: by 10.25.18.157 with SMTP id 29mr280678lfs.10.1473342099443; Thu, 08 Sep 2016 06:41:39 -0700 (PDT) Received: from linuslaptop.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id 89sm1305146lfq.39.2016.09.08.06.41.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Sep 2016 06:41:38 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Andy Gross , Rob Herring , devicetree@vger.kernel.org, Arnd Bergmann Cc: Stephen Boyd , Bjorn Andersson , David Brown , Linus Walleij Subject: [PATCH 1/2] ARM: dts: add EBI2 to the Qualcomm MSM8660 DTSI Date: Thu, 8 Sep 2016 15:41:31 +0200 Message-Id: <1473342091-30507-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This adds the external bus interface EBI2 to the MSM8660 device tree, albeit with status = "disabled" so that devices actually using EBI2 can turn it on if needed. Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - Use the new #address-cells = <2> for indicating the CS in the first address cell - Use the ranges property properly for defining the six different CS address windows - Define CS3 to properly map over 128MB - The EBI2 bindings are now ACKed by Rob Herring and a pull request to ARM SoC for both binding and driver is pending. - This should be safe to merge for v4.9 --- arch/arm/boot/dts/qcom-msm8660.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 8c65e0d82559..0b6348544598 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -141,6 +141,23 @@ }; }; + ebi2@1a100000 { + compatible = "qcom,msm8660-ebi2"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0x0 0x1a800000 0x00800000>, + <1 0x0 0x1b000000 0x00800000>, + <2 0x0 0x1b800000 0x00800000>, + <3 0x0 0x1d000000 0x08000000>, + <4 0x0 0x1c800000 0x00800000>, + <5 0x0 0x1c000000 0x00800000>; + reg = <0x1a100000 0x1000>, <0x1a110000 0x1000>; + reg-names = "ebi2", "xmem"; + clocks = <&gcc EBI2_2X_CLK>, <&gcc EBI2_CLK>; + clock-names = "ebi2x", "ebi2"; + status = "disabled"; + }; + qcom,ssbi@500000 { compatible = "qcom,ssbi"; reg = <0x500000 0x1000>;