From patchwork Tue Jun 28 21:43:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Pedersen X-Patchwork-Id: 71157 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp1817113qgy; Tue, 28 Jun 2016 14:44:50 -0700 (PDT) X-Received: by 10.67.3.227 with SMTP id bz3mr5562060pad.67.1467150289539; Tue, 28 Jun 2016 14:44:49 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g80si372960pfb.296.2016.06.28.14.44.49; Tue, 28 Jun 2016 14:44:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752506AbcF1Vor (ORCPT + 8 others); Tue, 28 Jun 2016 17:44:47 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:36054 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752370AbcF1Vop (ORCPT ); Tue, 28 Jun 2016 17:44:45 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 4FAA861375; Tue, 28 Jun 2016 21:43:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from twp-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: twp@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4A4EC611F1; Tue, 28 Jun 2016 21:43:07 +0000 (UTC) From: Thomas Pedersen To: linux-arm-msm@vger.kernel.org Cc: linux@qca.qualcomm.com, Andy Gross , Thomas Pedersen , Vinod Koul , Rob Herring , Mark Rutland Subject: [RESEND PATCH 1/5] dtbindings: qcom_adm: Fix channel specifiers Date: Tue, 28 Jun 2016 14:43:02 -0700 Message-Id: <1467150186-11427-2-git-send-email-twp@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467150186-11427-1-git-send-email-twp@codeaurora.org> References: <1467150186-11427-1-git-send-email-twp@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Andy Gross This patch removes the crci information from the dma channel property. At least one client device requires using more than one CRCI value for a channel. This does not match the current binding and the crci information needs to be removed. Instead, the client device will provide this information via other means. Signed-off-by: Andy Gross Signed-off-by: Thomas Pedersen --- Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt b/Documentation/devicetree/bindings/dma/qcom_adm.txt index 9bcab91..38d45f8 100644 --- a/Documentation/devicetree/bindings/dma/qcom_adm.txt +++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt @@ -4,8 +4,7 @@ Required properties: - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 - reg: Address range for DMA registers - interrupts: Should contain one interrupt shared by all channels -- #dma-cells: must be <2>. First cell denotes the channel number. Second cell - denotes CRCI (client rate control interface) flow control assignment. +- #dma-cells: must be <1>. First cell denotes the channel number. - clocks: Should contain the core clock and interface clock. - clock-names: Must contain "core" for the core clock and "iface" for the interface clock. @@ -22,7 +21,7 @@ Example: compatible = "qcom,adm"; reg = <0x18300000 0x100000>; interrupts = <0 170 0>; - #dma-cells = <2>; + #dma-cells = <1>; clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; clock-names = "core", "iface"; @@ -35,15 +34,12 @@ Example: qcom,ee = <0>; }; -DMA clients must use the format descripted in the dma.txt file, using a three +DMA clients must use the format descripted in the dma.txt file, using a two cell specifier for each channel. -Each dmas request consists of 3 cells: +Each dmas request consists of two cells: 1. phandle pointing to the DMA controller 2. channel number - 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0. - The CRCI is used for flow control. It identifies the peripheral device that - is the source/destination for the transferred data. Example: @@ -56,7 +52,7 @@ Example: cs-gpios = <&qcom_pinmux 20 0>; - dmas = <&adm_dma 6 9>, - <&adm_dma 5 10>; + dmas = <&adm_dma 6>, + <&adm_dma 5>; dma-names = "rx", "tx"; };