From patchwork Tue Jun 14 15:30:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 70044 Delivered-To: patch@linaro.org Received: by 10.140.106.246 with SMTP id e109csp2110388qgf; Tue, 14 Jun 2016 08:31:23 -0700 (PDT) X-Received: by 10.66.234.5 with SMTP id ua5mr28745946pac.115.1465918282848; Tue, 14 Jun 2016 08:31:22 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f1si39136555pfb.251.2016.06.14.08.31.22; Tue, 14 Jun 2016 08:31:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751342AbcFNPbV (ORCPT + 8 others); Tue, 14 Jun 2016 11:31:21 -0400 Received: from mail-lf0-f48.google.com ([209.85.215.48]:32818 "EHLO mail-lf0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751119AbcFNPbV (ORCPT ); Tue, 14 Jun 2016 11:31:21 -0400 Received: by mail-lf0-f48.google.com with SMTP id f6so85868865lfg.0 for ; Tue, 14 Jun 2016 08:31:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ihR41dEhdrBw3FFgNkidudSTKuih38WjPNhrS5LkURw=; b=eWQxe/DUaNv3vbS7jJtlHe/S7x2lnmrZNlwKdoHnI51bep0Qe8fFGrWVog3eWwQKYI LCGjpU6PpNRStt4L+6jHZFkdFtxGQiqB/O5xtkRHmo8tHXl1pBD2H1tzwH0NeGhPb51a Dz5+Ifq9btfaaRKDDAtVeOLY1LbAiPplwyUzw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ihR41dEhdrBw3FFgNkidudSTKuih38WjPNhrS5LkURw=; b=JnScsQGZHUefPl0xGl/UyFHQrR22KlIvbHqb5IxRmqmJZTz6W3mYEAEe0aQjZxZeDi HbVhzijo/I1rePp7grZCSYmZypi20rVhSC4wsbMDD4AJStmBDBYT9+Zc7xaLfnsJokIa A95x5d43yawYPCeN94WptZHZvS/pcsY5lTgTKJ8jJgFqw4KQmqqF3mmVZyBtn/m1jFTU zzIPrsHkATIkUNSQF5YKkETQR+HyGJdRfWdNDyCizPq7emQj1A3lJ0xLtnYqu3R19x98 eSPYIOqMZPjroiM7kmNm849q1X7JdwPLGrYsWIO3q5biPG3NlM5KwFy+aDbLtUu4wrfe I2Mg== X-Gm-Message-State: ALyK8tJ/KuVuMtN6b9tdzbaiPqx3DGjxPc06Q9/0kJTE2O9yLOPWscWzxZlkCpSBWjoTJBDs X-Received: by 10.25.17.104 with SMTP id g101mr2339552lfi.145.1465918279551; Tue, 14 Jun 2016 08:31:19 -0700 (PDT) Received: from localhost.localdomain.localdomain (c-cc7c71d5.014-348-6c756e10.cust.bredbandsbolaget.se. [213.113.124.204]) by smtp.gmail.com with ESMTPSA id e32sm2266067lji.41.2016.06.14.08.31.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Jun 2016 08:31:18 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Andy Gross Cc: Stephen Boyd , Bjorn Andersson , David Brown , Linus Walleij Subject: [PATCH 2/5] ARM: dts: add SDCC5 to Qualcomm MSM8660 Date: Tue, 14 Jun 2016 17:30:56 +0200 Message-Id: <1465918259-11138-3-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.11 In-Reply-To: <1465918259-11138-1-git-send-email-linus.walleij@linaro.org> References: <1465918259-11138-1-git-send-email-linus.walleij@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The SDCC5 SD/MMC controller is used for a second uSD slot on the APQ8060 Dragonboard. On most other systems it is just dark silicon so define it and leave it as "disabled" in the core SoC file. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/qcom-msm8660.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.4.11 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 6a62b62ad980..a5a38820554a 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -262,6 +262,22 @@ no-1-8-v; vmmc-supply = <&vsdcc_fixed>; }; + + sdcc5: sdcc@12200000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x12200000 0x8000>; + interrupts = ; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC5_CLK>, <&gcc SDC5_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + vmmc-supply = <&vsdcc_fixed>; + }; }; tcsr: syscon@1a400000 {