From patchwork Thu May 19 05:00:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 68078 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp2994994qge; Wed, 18 May 2016 22:00:57 -0700 (PDT) X-Received: by 10.66.21.102 with SMTP id u6mr16691300pae.118.1463634047345; Wed, 18 May 2016 22:00:47 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ur4si17170972pab.237.2016.05.18.22.00.47; Wed, 18 May 2016 22:00:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751809AbcESFAp (ORCPT + 8 others); Thu, 19 May 2016 01:00:45 -0400 Received: from mail-oi0-f46.google.com ([209.85.218.46]:34205 "EHLO mail-oi0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751948AbcESFAo (ORCPT ); Thu, 19 May 2016 01:00:44 -0400 Received: by mail-oi0-f46.google.com with SMTP id k142so111566358oib.1 for ; Wed, 18 May 2016 22:00:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Mut2aN1MTnuoMZy8Z9/oh+mGPIOhH+UtaaT8GjT3rj4=; b=fUlDyJ+5vTgCnb23oX/LCHMc+3qw7NfawdaC8gWeqc+q0STtZmnyVcf4MRf2ibeepF 7zhXRN5vKZmHeQA2bZwDaChXkc6FLCjhDXnoFc6a2elbcp/EEo6XB1KHuX5hURnXvjz5 Q0wsL6riQB45z2HWf+zYEL4nXhKIpB9Ykje+4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Mut2aN1MTnuoMZy8Z9/oh+mGPIOhH+UtaaT8GjT3rj4=; b=Q2rcOfduvbDeTE8oV026ys4fuy1MdPcTmsOBG/TG980kCicB/UFsTr587ASTm91zuW rBzpx9JW3CPsG+miuuTiEG9TxoXrNwtqxJ5gVNXz659DOs+oDkiX+heE1ny6iDkP7iL3 fgBpuGTPFL+fGFQ4Z9VroxyjyuBWOOfsFXLd2DfLRbZPRViLdkfbEMStzdvvem+sY5cZ 2c0PijITSHGjMrnfXYtnoUAwbqoz4mJilFPcTuq7vRTx1WV6i3dMcBcFH6ynOrwIuuYQ hAa60wd327+f8qsI6g7iklMxZc6vu2Ih9xO18IUnMNm47aj8OJkD5eVSrZJGnfCeTyCb g69g== X-Gm-Message-State: AOPr4FVdh+RRblssO/4AQ3XkaM15B20eVdU/B9JrpGV+H2bd6W4zVjtIcDbo7PR98z9q6mYK X-Received: by 10.157.13.227 with SMTP id 90mr7147478ots.79.1463634043554; Wed, 18 May 2016 22:00:43 -0700 (PDT) Received: from localhost ([2602:306:c558:19b0:a405:4675:28db:e07c]) by smtp.gmail.com with ESMTPSA id cn4sm3406967obb.21.2016.05.18.22.00.43 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Wed, 18 May 2016 22:00:43 -0700 (PDT) From: Andy Gross To: linux-pm@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, stanimir.varbanov@linaro.org, Andy Gross Subject: [PATCH 4/5] ARM: dts: qcom: Remove size elements from pmic reg Date: Thu, 19 May 2016 00:00:19 -0500 Message-Id: <1463634020-17252-5-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463634020-17252-1-git-send-email-andy.gross@linaro.org> References: <1463634020-17252-1-git-send-email-andy.gross@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The #size-cells for the pmics are 0, but we specify a size in the reg property so that MPP and GPIO modules can figure out how many pins there are. Now that we've done that by counting irqs, we can remove the size elements in the reg properties and be DT compliant. Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-pma8084.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Bjorn Andersson diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi index 4e9bd3f..ea7fce3 100644 --- a/arch/arm/boot/dts/qcom-pma8084.dtsi +++ b/arch/arm/boot/dts/qcom-pma8084.dtsi @@ -12,15 +12,15 @@ rtc@6000 { compatible = "qcom,pm8941-rtc"; - reg = <0x6000 0x100>, - <0x6100 0x100>; + reg = <0x6000>, + <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; }; pma8084_gpios: gpios@c000 { compatible = "qcom,pma8084-gpio", "qcom,spmi-gpio"; - reg = <0xc000 0x1600>; + reg = <0xc000>; gpio-controller; #gpio-cells = <2>; interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, @@ -49,7 +49,7 @@ pma8084_mpps: mpps@a000 { compatible = "qcom,pma8084-mpp", "qcom,spmi-mpp"; - reg = <0xa000 0x800>; + reg = <0xa000>; gpio-controller; #gpio-cells = <2>; interrupts = <0 0xa0 0 IRQ_TYPE_NONE>, @@ -64,7 +64,7 @@ pma8084_temp: temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; - reg = <0x2400 0x100>; + reg = <0x2400>; interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; #thermal-sensor-cells = <0>; io-channels = <&pma8084_vadc VADC_DIE_TEMP>; @@ -73,7 +73,7 @@ pma8084_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; - reg = <0x3100 0x100>; + reg = <0x3100>; interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>;