From patchwork Wed May 11 14:15:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 67544 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp251525qge; Wed, 11 May 2016 07:19:43 -0700 (PDT) X-Received: by 10.98.53.6 with SMTP id c6mr5358306pfa.89.1462976380719; Wed, 11 May 2016 07:19:40 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id lw5si10171651pab.94.2016.05.11.07.19.40; Wed, 11 May 2016 07:19:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932144AbcEKOR5 (ORCPT + 8 others); Wed, 11 May 2016 10:17:57 -0400 Received: from mail-oi0-f46.google.com ([209.85.218.46]:33516 "EHLO mail-oi0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751724AbcEKOR4 (ORCPT ); Wed, 11 May 2016 10:17:56 -0400 Received: by mail-oi0-f46.google.com with SMTP id v145so69531832oie.0 for ; Wed, 11 May 2016 07:17:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vBG4JKMGNpJE6jpy0okbyGgbKA1P0pzgFoNlTVneDQs=; b=AvD3m/LKF11itxxn5l8pWHAp3yKdj2Ujhy904qai4OZ9PGSjCCjfyIuDfwx1a1BKuP FPDQ/n2kUFH3nE3gZmQrCVdDG7C9llJS77ErepevMEyHcEjEYMtdJ+MvhiokyUgQT3DP jJFzgV0809uemw1aP9nguLtrd68Bi6QUDLa1w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vBG4JKMGNpJE6jpy0okbyGgbKA1P0pzgFoNlTVneDQs=; b=Ngrs9S6oT2c9gQg8NapuCbypYsfJ6fCOc/MGdNAhx5Z4kagWS7T12UpOVsK5J0tcK2 CnyNKgCxp/5lxd8g54zQStMyqdgy4WiGjQztQkHZZl3UXEJKDs9WcvabtGd56w+5AoKI XNQ1HR6xllr6Jkuzo2d/KJ6q3vgvP1maX6dWT69C7oNOFCI7H9VIDFJmchD4ITG5FRVi pqMfSBz4dnGn+SZGoF4WnOnJy1Uq/YNL4OGIVUXJ9OFtUgGcLnFWnjvHZEV0oavSvoWP pztmdCkkd6EiSjihciY/UCOvogU+k1B+tuhHu+ulzP4EirTeF6QbGIQVWoYKvOw/Sas3 Ra6Q== X-Gm-Message-State: AOPr4FW9iHcD/XNL5cvPOf2Utrgm869F+ntOzd3f7loJcojTde069UE+EG81S0aMDdCb2W+X X-Received: by 10.157.45.81 with SMTP id v75mr2233822ota.85.1462976274252; Wed, 11 May 2016 07:17:54 -0700 (PDT) Received: from localhost ([2602:306:c558:19b0:68a6:b401:fd49:9ae6]) by smtp.gmail.com with ESMTPSA id h5sm1606320oen.3.2016.05.11.07.17.53 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Wed, 11 May 2016 07:17:53 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bjorn Andersson , Stephen Boyd , jilai wang , Andy Gross Subject: [Patch v4 1/8] dt/bindings: firmware: Add Qualcomm SCM binding Date: Wed, 11 May 2016 09:15:51 -0500 Message-Id: <1462976158-26016-2-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462976158-26016-1-git-send-email-andy.gross@linaro.org> References: <1462976158-26016-1-git-send-email-andy.gross@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the device tree support for the Qualcomm SCM firmware. Signed-off-by: Andy Gross --- .../devicetree/bindings/firmware/qcom,scm.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Bjorn Andersson diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt new file mode 100644 index 0000000..0c5f1ff --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -0,0 +1,28 @@ +QCOM Secure Channel Manager (SCM) + +Qualcomm processors include an interface to communicate to the secure firmware. +This interface allows for clients to request different types of actions. These +can include CPU power up/down, HDCP requests, loading of firmware, and other +assorted actions. + +Required properties: +- compatible: must contain one of the following: + * "qcom,scm-apq8064" for APQ8064 platforms + * "qcom,scm-msm8660" for MSM8660 platforms + * "qcom,scm-msm8690" for MSM8690 platforms + * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc) +- clocks: One to three clocks may be required based on compatible. + * Only core clock required for "qcom,scm-apq8084", "qcom,scm-msm8660", and "qcom,scm-msm8960" + * Core, iface, and bus clocks required for "qcom,scm" +- clock-names: Must contain "core" for the core clock, "iface" for the interface + clock and "bus" for the bus clock per the requirements of the compatible. + +Example for MSM8916: + + firmware { + scm { + compatible = "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + };