From patchwork Tue Feb 23 17:21:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 62748 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp1949039lbl; Tue, 23 Feb 2016 09:21:21 -0800 (PST) X-Received: by 10.66.249.41 with SMTP id yr9mr47846131pac.86.1456248081297; Tue, 23 Feb 2016 09:21:21 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p22si48485018pfi.167.2016.02.23.09.21.20; Tue, 23 Feb 2016 09:21:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754275AbcBWRVT (ORCPT + 7 others); Tue, 23 Feb 2016 12:21:19 -0500 Received: from mail-wm0-f42.google.com ([74.125.82.42]:36058 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753882AbcBWRVS (ORCPT ); Tue, 23 Feb 2016 12:21:18 -0500 Received: by mail-wm0-f42.google.com with SMTP id g62so233468480wme.1 for ; Tue, 23 Feb 2016 09:21:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=uBpmXZuu4xXCZhigLNXMrsJTnFwsL2PyVvQFTSurzP0=; b=dfKjCMEGr8InHuD3w2lm4NdH3hFsG3421pXfpfLGWjgye0o07PFTYjHvzXGbbOX3+l Eo6/Fd66yVzLhwh8D0hj4L+DHOLxZWf4qyOPsoldTx1hkvqLaCeEiPH6+yN3lfPb+spU GsBK9zDzD/NmLPkjaJCB4EThJJqmfQISJu3BE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=uBpmXZuu4xXCZhigLNXMrsJTnFwsL2PyVvQFTSurzP0=; b=gPxoYaEPJ/o6lU8IYHOCnI77NZ1lCwrSVZAA42d+NkeJVAiMjfC4RdrneC4kQI3WdG AhJVe/qC4apm/7buwtNb/k93H6lI2d2U0Khv+6wiuMDf2JiRCY589oVncCdJF7moLUOh 4xv6K4YNE0UyeI3OWKxXMcsIRr3mP8lcxzkHvTF1rjFVY9/LyFYepCNf3aTSTafjtxmD 7I9fQuZCfGRl3wCpNRpnrW/7k0YQvlA1mrrtA6mhyzezciLsXApnC1MBdSPdKIILdd4p cHZz9FxNJtci8PNaCfeul35+E30wFD6o9fLlkBPjy7hu9jx1Ol9w2GY634r54HrdmGbR k9Lw== X-Gm-Message-State: AG10YOQh38pBM0151OSoT3HHQ7cG7g+mpkoIUZrOJ9wkUbe+7Wxg5AwVvASssSum62HxXX7s X-Received: by 10.194.8.38 with SMTP id o6mr35075489wja.31.1456248077296; Tue, 23 Feb 2016 09:21:17 -0800 (PST) Received: from mms.qualcomm.mm-sol.com ([37.157.136.206]) by smtp.googlemail.com with ESMTPSA id a128sm27123268wmh.6.2016.02.23.09.21.15 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 23 Feb 2016 09:21:16 -0800 (PST) From: Georgi Djakov To: andy.gross@linaro.org Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-kernel@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH] arm64: dts: msm8916: Move smem below hwlock Date: Tue, 23 Feb 2016 19:21:11 +0200 Message-Id: <1456248071-30547-1-git-send-email-georgi.djakov@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When the SMEM is probed it defers as it depends on the hardware lock, which is not available yet. But the SMD bus and RPM regulators and clocks depend on SMEM and they defer too. The problem with this is that the order of registering the devices is not optimal and also we may end with messed up serial console as the RPM clocks are not registered yet.. Signed-off-by: Georgi Djakov --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 7705207872a5..c497c7b1ae70 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -113,15 +113,6 @@ }; }; - smem { - compatible = "qcom,smem"; - - memory-region = <&smem_mem>; - qcom,rpm-msg-ram = <&rpm_msg_ram>; - - hwlocks = <&tcsr_mutex 3>; - }; - soc: soc { #address-cells = <1>; #size-cells = <1>; @@ -512,6 +503,16 @@ }; }; + smem { + compatible = "qcom,smem"; + + memory-region = <&smem_mem>; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + + hwlocks = <&tcsr_mutex 3>; + }; + + smd { compatible = "qcom,smd";