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[92.13.246.184]) by smtp.gmail.com with ESMTPSA id mc18sm15278762wic.23.2015.09.18.05.31.55 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 18 Sep 2015 05:31:55 -0700 (PDT) From: Srinivas Kandagatla To: agross@codeaurora.org, linux-arm-msm@vger.kernel.org Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Russell King , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@linaro.org Subject: [PATCH 10/14] ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart Date: Fri, 18 Sep 2015 13:31:53 +0100 Message-Id: <1442579513-20356-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1442579371-19822-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1442579371-19822-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: srinivas.kandagatla@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.49 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch adds missing 2pin uart pinctrl property to gsbi7 uart on CM-QS600. Signed-off-by: Srinivas Kandagatla Acked-by: Igor Grinberg --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index bdea747..8aac3be 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -101,6 +101,8 @@ qcom,mode = ; serial@16640000 { status = "ok"; + pinctrl-names = "default"; + pinctrl-0 = <&gsbi7_uart_2pins>; }; };