From patchwork Mon Jan 26 10:13:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 43730 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ee0-f71.google.com (mail-ee0-f71.google.com [74.125.83.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id D3C9420D5D for ; Mon, 26 Jan 2015 10:13:25 +0000 (UTC) Received: by mail-ee0-f71.google.com with SMTP id d49sf3719760eek.2 for ; Mon, 26 Jan 2015 02:13:25 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=XQjw7FWwVeICb2C8l/uy6rmWeHjglFS5SrbuhONuO6Q=; b=TGCax1EhCypBn5CJXgGK8U52W/PFvDFcg81TpyvGt83ViMrBiyXBTeQUNkJmXQ0k0I kdBOZlu37FN0IHjZy57PXos5nC1LTuBAaDD1jdaeJt7+nv3ixy4+bk6QyRwXyY/WnQ1v UMsz7suZJSPkdl7R8HpMjShIknUKu25zTasiwxydZBpifDEDzl7c7MbpvXkO6LCjy0Mv Lk6FEwnjuS70f45z9UdAKVSAi8cMgg7QXygdDwMeR/45OFlSZgiv1FGo/Tx4g3JN52Ml +T5bmWl/3J7OsqLZFituv5I17hxqZDClw6EJhCgEj6N3AW9Mse/EHPu/n2Vf3gtk/8+n 3F/w== X-Gm-Message-State: ALoCoQlJd58pnWfsTPCNWjfvZu2HgGDA6muS0OP8KCfUvkpELFveEcZ7EV3J4Mk0JAXA2CLpwsh0 X-Received: by 10.180.98.199 with SMTP id ek7mr1707407wib.1.1422267205033; Mon, 26 Jan 2015 02:13:25 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.1.6 with SMTP id 6ls40550lai.30.gmail; Mon, 26 Jan 2015 02:13:24 -0800 (PST) X-Received: by 10.112.84.225 with SMTP id c1mr2617810lbz.22.1422267204880; Mon, 26 Jan 2015 02:13:24 -0800 (PST) Received: from mail-la0-f51.google.com (mail-la0-f51.google.com. [209.85.215.51]) by mx.google.com with ESMTPS id kw4si8562827lac.133.2015.01.26.02.13.24 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 26 Jan 2015 02:13:24 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) client-ip=209.85.215.51; Received: by mail-la0-f51.google.com with SMTP id ge10so6814432lab.10 for ; Mon, 26 Jan 2015 02:13:24 -0800 (PST) X-Received: by 10.112.52.229 with SMTP id w5mr20331623lbo.52.1422267204803; Mon, 26 Jan 2015 02:13:24 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.112.35.133 with SMTP id h5csp729347lbj; Mon, 26 Jan 2015 02:13:24 -0800 (PST) X-Received: by 10.194.243.165 with SMTP id wz5mr13348978wjc.1.1422267204088; Mon, 26 Jan 2015 02:13:24 -0800 (PST) Received: from mail-we0-f176.google.com (mail-we0-f176.google.com. [74.125.82.176]) by mx.google.com with ESMTPS id eo6si18836095wib.75.2015.01.26.02.13.23 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 26 Jan 2015 02:13:24 -0800 (PST) Received-SPF: pass (google.com: domain of srinivas.kandagatla@linaro.org designates 74.125.82.176 as permitted sender) client-ip=74.125.82.176; Received: by mail-we0-f176.google.com with SMTP id w62so8111753wes.7 for ; Mon, 26 Jan 2015 02:13:23 -0800 (PST) X-Received: by 10.180.109.79 with SMTP id hq15mr4220053wib.47.1422267203789; Mon, 26 Jan 2015 02:13:23 -0800 (PST) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-2-98-216-248.as13285.net. [2.98.216.248]) by mx.google.com with ESMTPSA id bj3sm13279148wib.3.2015.01.26.02.13.21 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 26 Jan 2015 02:13:23 -0800 (PST) From: Srinivas Kandagatla To: linux-arm-msm@vger.kernel.org Cc: patches@linaro.org, linaro-kernel@lists.linaro.org, Srinivas Kandagatla Subject: [RFC PATCH 1/2] WIP: mfd: syscon: Add register stride to DT bindings. Date: Mon, 26 Jan 2015 10:13:13 +0000 Message-Id: <1422267193-6145-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1422267151-6034-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1422267151-6034-1-git-send-email-srinivas.kandagatla@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: srinivas.kandagatla@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch adds register stride to dt bindings so that the consumers of the syscon could change it to there need. One of the the use case for this feature is Qualcomm qfprom which needs a byte access to regmap returned from syscon. Signed-off-by: Srinivas Kandagatla --- Documentation/devicetree/bindings/mfd/syscon.txt | 3 +++ drivers/mfd/syscon.c | 9 +++++++++ 2 files changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.txt b/Documentation/devicetree/bindings/mfd/syscon.txt index fe8150b..7f06ec1 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.txt +++ b/Documentation/devicetree/bindings/mfd/syscon.txt @@ -13,6 +13,9 @@ Required properties: - compatible: Should contain "syscon". - reg: the register region can be accessed from syscon +Optional properties: +- stride : register address stride in bytes. + Examples: gpr: iomuxc-gpr@020e0000 { compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index 176bf0f..98769d5 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -48,6 +48,7 @@ static struct syscon *of_syscon_register(struct device_node *np) struct regmap *regmap; void __iomem *base; int ret; + u32 stride; struct regmap_config syscon_config = syscon_regmap_config; if (!of_device_is_compatible(np, "syscon")) @@ -69,6 +70,14 @@ static struct syscon *of_syscon_register(struct device_node *np) else if (of_property_read_bool(np, "little-endian")) syscon_config.val_format_endian = REGMAP_ENDIAN_LITTLE; + if (!of_property_read_u32(np, "stride", &stride)) { + if (stride > 4) + stride = 4; + + syscon_config.reg_stride = stride; + syscon_config.val_bits = 8 * stride; + } + regmap = regmap_init_mmio(NULL, base, &syscon_config); if (IS_ERR(regmap)) { pr_err("regmap init failed\n");