From patchwork Wed Nov 26 22:28:30 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 41574 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f71.google.com (mail-la0-f71.google.com [209.85.215.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 7D81325E18 for ; Wed, 26 Nov 2014 22:29:24 +0000 (UTC) Received: by mail-la0-f71.google.com with SMTP id s18sf2355487lam.2 for ; Wed, 26 Nov 2014 14:29:23 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=JEBQ+l+nE8YoT6f0XY88N3cUx1b/WDdnaNR0qlvEVrQ=; b=fj/lRa0WGRLD5Yyo7YecVFYQG+EF/MWZGK0Bjcp6UIsay2VZqDFY+W2rl4utLB17cv IC9bh3zugP+GXZVmw/8W66kIcCCQnpCfkXMaN0fkgeIaXRRdwjxG7drk8pjDqzg3UIAm 8wmlXpKhuxlZACnJqC8/NSjwHUNDuwtBU4OpTcfPhA4mD/O2kB5KX9i6ujDKkW6iHjXe OKKidj5oQz9kT5yDb2L28MJdulH4ltK2DSw0dWweeWGFPWGyLVo2S0o1Y3TQ+q4NBL2y yuQnsIHb1qcPKsAFvSV3LJa5RTjDAAaADmwH+sZtcLt4hsfYyXkQR+jmLbBS82+y+NAt kC1Q== X-Gm-Message-State: ALoCoQl2GwPcfL7jRrru7GoHkWhvFvkWTTccnDKh4Qb/ToX6oRPdirKjAP/3fazPhKtIrNgxGwhz X-Received: by 10.112.147.131 with SMTP id tk3mr9692334lbb.2.1417040963512; Wed, 26 Nov 2014 14:29:23 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.6.169 with SMTP id c9ls697339laa.104.gmail; Wed, 26 Nov 2014 14:29:22 -0800 (PST) X-Received: by 10.152.21.167 with SMTP id w7mr36472976lae.70.1417040962856; Wed, 26 Nov 2014 14:29:22 -0800 (PST) Received: from mail-lb0-f169.google.com (mail-lb0-f169.google.com. [209.85.217.169]) by mx.google.com with ESMTPS id ap3si5624302lbc.33.2014.11.26.14.29.22 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 26 Nov 2014 14:29:22 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) client-ip=209.85.217.169; Received: by mail-lb0-f169.google.com with SMTP id p9so3265265lbv.28 for ; Wed, 26 Nov 2014 14:29:22 -0800 (PST) X-Received: by 10.112.189.10 with SMTP id ge10mr35641485lbc.23.1417040962719; Wed, 26 Nov 2014 14:29:22 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.184.201 with SMTP id ew9csp708898lbc; Wed, 26 Nov 2014 14:29:22 -0800 (PST) X-Received: by 10.70.9.132 with SMTP id z4mr10354042pda.158.1417040948950; Wed, 26 Nov 2014 14:29:08 -0800 (PST) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ae10si8754961pbd.132.2014.11.26.14.29.08 for ; Wed, 26 Nov 2014 14:29:08 -0800 (PST) Received-SPF: none (google.com: linux-arm-msm-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753222AbaKZW3G (ORCPT + 5 others); Wed, 26 Nov 2014 17:29:06 -0500 Received: from mail-pd0-f182.google.com ([209.85.192.182]:39242 "EHLO mail-pd0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753180AbaKZW3F (ORCPT ); Wed, 26 Nov 2014 17:29:05 -0500 Received: by mail-pd0-f182.google.com with SMTP id r10so3640913pdi.13 for ; Wed, 26 Nov 2014 14:29:04 -0800 (PST) X-Received: by 10.68.227.104 with SMTP id rz8mr1506163pbc.4.1417040944784; Wed, 26 Nov 2014 14:29:04 -0800 (PST) Received: from ubuntu.localdomain (proxy6-global253.qualcomm.com. [199.106.103.253]) by mx.google.com with ESMTPSA id xd3sm5219025pbc.54.2014.11.26.14.29.02 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 26 Nov 2014 14:29:04 -0800 (PST) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: lorenzo.pieralisi@arm.com, msivasub@codeaurora.org, devicetree@vger.kernel.org, Lina Iyer Subject: [PATCH 10/10] arm: dts: qcom: Add idle state device nodes for 8064 Date: Wed, 26 Nov 2014 15:28:30 -0700 Message-Id: <1417040910-43290-11-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1417040910-43290-1-git-send-email-lina.iyer@linaro.org> References: <1417040910-43290-1-git-send-email-lina.iyer@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lina.iyer@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add ARM common idle state device bindings for cpuidle support for APQ 8064. Support Standby and Standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer Reviewed-by: Stephen Boyd --- arch/arm/boot/dts/qcom-apq8064.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 9fd24bc..ab21dba 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -23,6 +23,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@1 { @@ -33,6 +34,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@2 { @@ -43,6 +45,7 @@ next-level-cache = <&L2>; qcom,acc = <&acc2>; qcom,saw = <&saw2>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu@3 { @@ -53,12 +56,29 @@ next-level-cache = <&L2>; qcom,acc = <&acc3>; qcom,saw = <&saw3>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; L2: l2-cache { compatible = "cache"; cache-level = <2>; }; + + idle-states { + CPU_STBY: standby { + compatible = "qcom,idle-state-stby", "arm,idle-state"; + entry-latency-us = <1>; + exit-latency-us = <1>; + min-residency-us = <2>; + }; + + CPU_SPC: spc { + compatible = "qcom,idle-state-spc", "arm,idle-state"; + entry-latency-us = <400>; + exit-latency-us = <900>; + min-residency-us = <3000>; + }; + }; }; cpu-pmu {