From patchwork Mon Aug 18 22:23:34 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 35546 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oi0-f69.google.com (mail-oi0-f69.google.com [209.85.218.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 5D1C520676 for ; Mon, 18 Aug 2014 22:24:12 +0000 (UTC) Received: by mail-oi0-f69.google.com with SMTP id h136sf33775911oig.0 for ; Mon, 18 Aug 2014 15:24:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=8zCggtsc5BTNnj2RG5uW4+Ip94/SumNxYPsHdR6Fyzw=; b=cASmuilci/BN8VoRlB154EiGPx8hQSn7qeitVbT1bxstAXPZ2yy264Xiwf6wPpuwxI LhBEEEk+hbFMRO+P7KE10mMfnwx171JGBLmZJrT+VqE1qJV3BD96YsP+eojJhlv9Pbar C8cwJ8mggoP/g0T4+dM3UZ474jndacW89FkbmQt71Cd9UK9cgv/e3XRmvj8UPaKEAJmY 0vG4LOdhPMZR7JAeW7po5RHwz8N3iHReulTtFyVmM4GT/uwnl6JyTlD9wbcbL6GU1kjJ yqoTKoOb8i+k+qZFGyKer960Vd//7f2defkkUq0ONHbxB9K9y4sewI2YyARw3aHxwR6z YUSg== X-Gm-Message-State: ALoCoQmFQgcMdg4Zf6CElJnII2/gHCKpwaCAHfMXEsBKlbZPfXCJQ0DCbnr8eNXAaVVc3S+o9gnc X-Received: by 10.50.57.111 with SMTP id h15mr1183212igq.3.1408400651970; Mon, 18 Aug 2014 15:24:11 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.106.136 with SMTP id e8ls1361410qgf.36.gmail; Mon, 18 Aug 2014 15:24:11 -0700 (PDT) X-Received: by 10.52.135.133 with SMTP id ps5mr10470602vdb.33.1408400651784; Mon, 18 Aug 2014 15:24:11 -0700 (PDT) Received: from mail-vc0-f176.google.com (mail-vc0-f176.google.com [209.85.220.176]) by mx.google.com with ESMTPS id n4si7757142vcm.58.2014.08.18.15.24.11 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 18 Aug 2014 15:24:11 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.176 as permitted sender) client-ip=209.85.220.176; Received: by mail-vc0-f176.google.com with SMTP id id10so6520684vcb.35 for ; Mon, 18 Aug 2014 15:24:11 -0700 (PDT) X-Received: by 10.221.5.137 with SMTP id og9mr27190723vcb.18.1408400651715; Mon, 18 Aug 2014 15:24:11 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp189800vcb; Mon, 18 Aug 2014 15:24:11 -0700 (PDT) X-Received: by 10.66.142.42 with SMTP id rt10mr38894861pab.1.1408400650796; Mon, 18 Aug 2014 15:24:10 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id pc2si23819953pac.118.2014.08.18.15.24.10 for ; Mon, 18 Aug 2014 15:24:10 -0700 (PDT) Received-SPF: none (google.com: linux-arm-msm-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752427AbaHRWYJ (ORCPT + 5 others); Mon, 18 Aug 2014 18:24:09 -0400 Received: from mail-pa0-f53.google.com ([209.85.220.53]:44718 "EHLO mail-pa0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752422AbaHRWYI (ORCPT ); Mon, 18 Aug 2014 18:24:08 -0400 Received: by mail-pa0-f53.google.com with SMTP id rd3so8402009pab.26 for ; Mon, 18 Aug 2014 15:24:07 -0700 (PDT) X-Received: by 10.66.161.130 with SMTP id xs2mr37366921pab.36.1408400647004; Mon, 18 Aug 2014 15:24:07 -0700 (PDT) Received: from ubuntu.localdomain (proxy6-global253.qualcomm.com. [199.106.103.253]) by mx.google.com with ESMTPSA id nn3sm25508125pdb.58.2014.08.18.15.24.05 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Aug 2014 15:24:06 -0700 (PDT) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, davidb@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, lorenzo.pieralisi@arm.com Cc: msivasub@codeauorora.org, Lina Iyer Subject: [PATCH v3 8/8] arm: dts: qcom: Add idle states device nodes for 8974 Date: Mon, 18 Aug 2014 16:23:34 -0600 Message-Id: <1408400614-45419-9-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1408400614-45419-1-git-send-email-lina.iyer@linaro.org> References: <1408400614-45419-1-git-send-email-lina.iyer@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lina.iyer@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add allowable C-States for each cpu using the cpu-idle-states node. ARM spec dictates WFI as the default idle state at 0. Support standalone power collapse (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer --- arch/arm/boot/dts/qcom-msm8974.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 0580bc2..fd66afb 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -21,6 +21,7 @@ reg = <0>; next-level-cache = <&L2>; qcom,acc = <&acc0>; + cpu-idle-states = <&CPU_SPC>; }; CPU1: cpu@1 { @@ -30,6 +31,7 @@ reg = <1>; next-level-cache = <&L2>; qcom,acc = <&acc1>; + cpu-idle-states = <&CPU_SPC>; }; CPU2: cpu@2 { @@ -39,6 +41,7 @@ reg = <2>; next-level-cache = <&L2>; qcom,acc = <&acc2>; + cpu-idle-states = <&CPU_SPC>; }; CPU3: cpu@3 { @@ -48,6 +51,7 @@ reg = <3>; next-level-cache = <&L2>; qcom,acc = <&acc3>; + cpu-idle-states = <&CPU_SPC>; }; L2: l2-cache { @@ -55,6 +59,16 @@ cache-level = <2>; qcom,saw = <&saw_l2>; }; + + idle-states { + CPU_SPC: cpu-sleep-0 { + compatible = "arm,idle-state"; + entry-latency-us = <150>; + exit-latency-us = <200>; + min-residency-us = <2000>; + entry-method = "standalone-pc"; + }; + }; }; cpu-pmu {