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Clock fixes for DSI 10nm PLL
| 5 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[5/5] drm/msm/dsi_pll_10nm: Convert pr_err prints to DRM_DEV_ERROR
Clock fixes for DSI 10nm PLL
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-
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2021-01-09
AngeloGioacchino Del Regno
Accepted
[4/5] drm/msm/dsi_pll_10nm: Fix variable usage for pll_lockdet_rate
Clock fixes for DSI 10nm PLL
-
-
-
2021-01-09
AngeloGioacchino Del Regno
Accepted
[3/5] drm/msm/dsi_pll_10nm: Fix bad VCO rate calculation and prescaler
Clock fixes for DSI 10nm PLL
-
-
-
2021-01-09
AngeloGioacchino Del Regno
New
[2/5] drm/msm/dsi_pll_10nm: Solve TODO for multiplier frac_bits assignment
Clock fixes for DSI 10nm PLL
-
-
-
2021-01-09
AngeloGioacchino Del Regno
Accepted
[1/5] drm/msm/dsi_pll_10nm: Fix dividing the same numbers twice
Clock fixes for DSI 10nm PLL
-
-
-
2021-01-09
AngeloGioacchino Del Regno
Accepted