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Show patches with
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drm/msm: dpu1: correctly implement SSPP & WB Clock Control Split
| 5 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[RFC,5/5] drm/msm: dpu1: sm8550: move split clock controls to sspp entries
drm/msm: dpu1: correctly implement SSPP & WB Clock Control Split
-
-
-
2023-10-09
Neil Armstrong
New
[RFC,4/5] drm/msm: dpu1: call wb & sspp clk_force_ctrl op if split clock control
drm/msm: dpu1: correctly implement SSPP & WB Clock Control Split
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-
-
2023-10-09
Neil Armstrong
New
[RFC,3/5] drm/msm: dpu1: vbif: add dpu_vbif_setup_clk_force_ctrl() helper
drm/msm: dpu1: correctly implement SSPP & WB Clock Control Split
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-
-
2023-10-09
Neil Armstrong
New
[RFC,2/5] drm/msm: dpu1: add setup_clk_force_ctrl() op to sspp & wb
drm/msm: dpu1: correctly implement SSPP & WB Clock Control Split
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-
-
2023-10-09
Neil Armstrong
New
[RFC,1/5] drm/msm: dpu1: create a dpu_hw_clk_force_ctrl() helper
drm/msm: dpu1: correctly implement SSPP & WB Clock Control Split
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-
-
2023-10-09
Neil Armstrong
Superseded