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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-30f3651611bsm4617101a91.49.2025.05.21.17.14.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 May 2025 17:14:28 -0700 (PDT) From: Mayank Rana To: linux-pci@vger.kernel.org, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, bhelgaas@google.com, andersson@kernel.org, manivannan.sadhasivam@linaro.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, quic_ramkri@quicinc.com, quic_nkela@quicinc.com, quic_shazhuss@quicinc.com, quic_msarkar@quicinc.com, quic_nitegupt@quicinc.com, Mayank Rana Subject: [PATCH v4 0/4] Add Qualcomm SA8255p based firmware managed PCIe root complex Date: Wed, 21 May 2025 17:14:21 -0700 Message-Id: <20250522001425.1506240-1-mayank.rana@oss.qualcomm.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-GUID: vs4oSzjK4l_AKu0IVX1c5wXrUudPnqXQ X-Proofpoint-ORIG-GUID: vs4oSzjK4l_AKu0IVX1c5wXrUudPnqXQ X-Authority-Analysis: v=2.4 cv=ZP3XmW7b c=1 sm=1 tr=0 ts=682e6c66 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=GGYVUzGw-MCdzQFq8EIA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTIyMDAwMCBTYWx0ZWRfX8d+HVZ+IHtWJ icfS/8SgRpqdk9+YaOCeggm7bRQWPOlSfbHz1XjF79FW2Qva3nzpIGgCaq6OeO1DnvCBGUlp5l9 en5LGHa4QCJGNZrXJwnlPC1M778VEH2N2IJbQB+WbzWKnFpnT8YyUNNLp9xRuIqTQzzv08HTCvK qLr+qX9M4g+CWUv7hqVVxy3pWNL5YOpdtyJmxhEKWPGKGHdModSflmo6BWHae45btLLPagMwOmt qu/7ceHBkB4uO0FpGlRVremXgkwHYeckdZAjHq4au7HW1j/0xkucXFmPq9b/HK5ynqoJ7exAMus zxRkzEGPZjU2iKqfssR4dZAUTNBpD7NC5TkX2JSz9jSSNmI3rl5dcmORuvBvgtyF5H9DvLIE+kr 5OxZEUGOXAv3x9HHRibI9c3pAAp75nK2gByw5q2bL7JC/kIMjDa/ulQWMhELFkxlJWQu8FPv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-21_07,2025-05-20_03,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 mlxlogscore=994 suspectscore=0 bulkscore=0 impostorscore=0 phishscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1011 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505160000 definitions=main-2505220000 Based on received feedback, this patch series adds support with existing Linux qcom-pcie.c driver to get PCIe host root complex functionality on Qualcomm SA8255P auto platform. 1. Interface to allow requesting firmware to manage system resources and performing PCIe Link up (devicetree binding in terms of power domain and runtime PM APIs is used in driver) 2. SA8255P is using Synopsys Designware PCIe controller which supports MSI controller. Using existing MSI controller based functionality by exporting important pcie dwc core driver based MSI APIs, and using those from pcie-qcom.c driver. Below architecture is used on Qualcomm SA8255P auto platform to get ECAM compliant PCIe controller based functionality. Here firmware VM based PCIe driver takes care of resource management and performing PCIe link related handling (D0 and D3cold). Linux pcie-qcom.c driver uses power domain to request firmware VM to perform these operations using SCMI interface. -------------------- ┌────────────────────────┐ │ │ ┌──────────────────────┐ │ SHARED MEMORY │ ┌──────────────────────────┐ │ Firmware VM │ │ │ │ Linux VM │ │ ┌─────────┐ │ │ │ │ ┌────────────────┐ │ │ │ Drivers │ ┌──────┐ │ │ │ │ │ PCIE Qcom │ │ │ │ PCIE PHY◄─┤ │ │ │ ┌────────────────┐ │ │ │ driver │ │ │ │ │ │ SCMI │ │ │ │ │ │ │ │ │ │ │ │PCIE CTL │ │ │ ├─────────┼───► PCIE ◄───┼─────┐ │ └──┬──────────▲──┘ │ │ │ ├─►Server│ │ │ │ SHMEM │ │ │ │ │ │ │ │ │Clk, Vreg│ │ │ │ │ │ │ │ │ │ ┌──▼──────────┴──┐ │ │ │GPIO,GDSC│ └─▲──┬─┘ │ │ └────────────────┘ │ └──────┼────┤PCIE SCMI Inst │ │ │ └─────────┘ │ │ │ │ │ │ └──▲──────────┬──┘ │ │ │ │ │ │ │ │ │ │ │ └───────────────┼──┼───┘ │ │ └───────┼──────────┼───────┘ │ │ │ │ │ │ │ │ └────────────────────────┘ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │IRQ │HVC IRQ │ │HVC │ │ │ │ │ │ │ │ │ │ │ │ │ │ ┌─────────────────┴──▼───────────────────────────────────────────────────────────┴──────────▼──────────────┐ │ │ │ │ │ HYPERVISOR │ │ │ │ │ │ │ └──────────────────────────────────────────────────────────────────────────────────────────────────────────┘ ┌─────────────┐ ┌─────────────┐ ┌──────────┐ ┌───────────┐ ┌─────────────┐ ┌────────────┐ │ │ │ │ │ │ │ │ │ PCIE │ │ PCIE │ │ CLOCK │ │ REGULATOR │ │ GPIO │ │ GDSC │ │ PHY │ │ controller │ └─────────────┘ └─────────────┘ └──────────┘ └───────────┘ └─────────────┘ └────────────┘ ----------------- Changes in v4: - Addressed provided review comments from reviewers Link to v3: https://lore.kernel.org/lkml/20241106221341.2218416-1-quic_mrana@quicinc.com/ Changes in v3: - Drop usage of PCIE host generic driver usage, and splitting of MSI functionality - Modified existing pcie-qcom.c driver to add support for getting ECAM compliant and firmware managed PCIe root complex functionality Link to v2: https://lore.kernel.org/linux-arm-kernel/925d1eca-975f-4eec-bdf8-ca07a892361a@quicinc.com/T/ Changes in v2: - Drop new PCIe Qcom ECAM driver, and use existing PCIe designware based MSI functionality - Add power domain based functionality within existing ECAM driver Link to v1: https://lore.kernel.org/all/d10199df-5fb3-407b-b404-a0a4d067341f@quicinc.com/T/ Tested: - Validated NVME functionality with PCIe1 on SA8255P-RIDE platform Mayank Rana (4): PCI: dwc: Export dwc MSI controller related APIs PCI: host-generic: Rename and export gen_pci_init() API to allow ECAM creation dt-bindings: PCI: qcom,pcie-sa8255p: Document ECAM compliant PCIe root complex PCI: qcom: Add Qualcomm SA8255p based PCIe root complex functionality .../bindings/pci/qcom,pcie-sa8255p.yaml | 103 ++++++++++++++++ drivers/pci/controller/dwc/Kconfig | 1 + .../pci/controller/dwc/pcie-designware-host.c | 38 +++--- drivers/pci/controller/dwc/pcie-designware.h | 14 +++ drivers/pci/controller/dwc/pcie-qcom.c | 114 ++++++++++++++++-- drivers/pci/controller/pci-host-common.c | 5 +- include/linux/pci-ecam.h | 2 + 7 files changed, 248 insertions(+), 29 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/qcom,pcie-sa8255p.yaml