| Message ID | 20250515-qpic-snand-use-bitmasks-v1-0-11729aeae73b@gmail.com |
|---|---|
| Headers | show |
| Series | spi: spi-qpic-snand: extend bitmasks usage | expand |
On 5/16/2025 12:28 AM, Gabor Juhos wrote: > Change the code to use the already defined CW_PER_PAGE_MASK > bitmask along with the FIELD_PREP() macro instead of using > magic values. > > This makes the code more readable. It also syncs the affected > codes with their counterparts in the 'qcom_nandc' driver, so it > makes it easier to spot the differences between the two > implementations. > > No functional changes intended. > > Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> > --- > drivers/spi/spi-qpic-snand.c | 31 ++++++++++++++++--------------- > 1 file changed, 16 insertions(+), 15 deletions(-) > > diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c > index 7207bbb57802ce53dfab4d9689113e7f9ba8f131..bc45b834fadc5456eda1fe778e5ca8b16177465e 100644 > --- a/drivers/spi/spi-qpic-snand.c > +++ b/drivers/spi/spi-qpic-snand.c > @@ -483,7 +483,8 @@ static int qcom_spi_block_erase(struct qcom_nand_controller *snandc) > snandc->regs->cmd = snandc->qspi->cmd; > snandc->regs->addr0 = snandc->qspi->addr1; > snandc->regs->addr1 = snandc->qspi->addr2; > - snandc->regs->cfg0 = cpu_to_le32(ecc_cfg->cfg0_raw & ~(7 << CW_PER_PAGE)); > + snandc->regs->cfg0 = cpu_to_le32((ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) | > + FIELD_PREP(CW_PER_PAGE_MASK, 0)); > snandc->regs->cfg1 = cpu_to_le32(ecc_cfg->cfg1_raw); > snandc->regs->exec = cpu_to_le32(1); > > @@ -544,8 +545,8 @@ static int qcom_spi_read_last_cw(struct qcom_nand_controller *snandc, > snandc->regs->addr0 = (snandc->qspi->addr1 | cpu_to_le32(col)); > snandc->regs->addr1 = snandc->qspi->addr2; > > - cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) | > - 0 << CW_PER_PAGE; > + cfg0 = (ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) | > + FIELD_PREP(CW_PER_PAGE_MASK, 0); > cfg1 = ecc_cfg->cfg1_raw; > ecc_bch_cfg = ECC_CFG_ECC_DISABLE; > > @@ -687,8 +688,8 @@ static int qcom_spi_read_cw_raw(struct qcom_nand_controller *snandc, u8 *data_bu > qcom_clear_bam_transaction(snandc); > raw_cw = num_cw - 1; > > - cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) | > - 0 << CW_PER_PAGE; > + cfg0 = (ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) | > + FIELD_PREP(CW_PER_PAGE_MASK, 0); > cfg1 = ecc_cfg->cfg1_raw; > ecc_bch_cfg = ECC_CFG_ECC_DISABLE; > > @@ -808,8 +809,8 @@ static int qcom_spi_read_page_ecc(struct qcom_nand_controller *snandc, > snandc->buf_start = 0; > qcom_clear_read_regs(snandc); > > - cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) | > - (num_cw - 1) << CW_PER_PAGE; > + cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) | > + FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1); > cfg1 = ecc_cfg->cfg1; > ecc_bch_cfg = ecc_cfg->ecc_bch_cfg; > > @@ -904,8 +905,8 @@ static int qcom_spi_read_page_oob(struct qcom_nand_controller *snandc, > qcom_clear_read_regs(snandc); > qcom_clear_bam_transaction(snandc); > > - cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) | > - (num_cw - 1) << CW_PER_PAGE; > + cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) | > + FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1); > cfg1 = ecc_cfg->cfg1; > ecc_bch_cfg = ecc_cfg->ecc_bch_cfg; > > @@ -1015,8 +1016,8 @@ static int qcom_spi_program_raw(struct qcom_nand_controller *snandc, > int num_cw = snandc->qspi->num_cw; > u32 cfg0, cfg1, ecc_bch_cfg; > > - cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) | > - (num_cw - 1) << CW_PER_PAGE; > + cfg0 = (ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) | > + FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1); > cfg1 = ecc_cfg->cfg1_raw; > ecc_bch_cfg = ECC_CFG_ECC_DISABLE; > > @@ -1098,8 +1099,8 @@ static int qcom_spi_program_ecc(struct qcom_nand_controller *snandc, > int num_cw = snandc->qspi->num_cw; > u32 cfg0, cfg1, ecc_bch_cfg, ecc_buf_cfg; > > - cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) | > - (num_cw - 1) << CW_PER_PAGE; > + cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) | > + FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1); > cfg1 = ecc_cfg->cfg1; > ecc_bch_cfg = ecc_cfg->ecc_bch_cfg; > ecc_buf_cfg = ecc_cfg->ecc_buf_cfg; > @@ -1175,8 +1176,8 @@ static int qcom_spi_program_oob(struct qcom_nand_controller *snandc, > int num_cw = snandc->qspi->num_cw; > u32 cfg0, cfg1, ecc_bch_cfg, ecc_buf_cfg; > > - cfg0 = (ecc_cfg->cfg0 & ~(7U << CW_PER_PAGE)) | > - (num_cw - 1) << CW_PER_PAGE; > + cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) | > + FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1); > cfg1 = ecc_cfg->cfg1; > ecc_bch_cfg = ecc_cfg->ecc_bch_cfg; > ecc_buf_cfg = ecc_cfg->ecc_buf_cfg; > Reviewed-by: Md Sadre Alam <quic_mdalam@quicinc.com>
The two patches in the series are extending the usage of FIELD_PREP() macro and predefined bitmasks usage in the driver. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> --- Gabor Juhos (2): spi: spi-qpic-snand: use CW_PER_PAGE_MASK bitmask spi: spi-qpic-snand: extend FIELD_PREP() macro usage drivers/spi/spi-qpic-snand.c | 45 ++++++++++++++++++++++---------------------- 1 file changed, 23 insertions(+), 22 deletions(-) --- base-commit: 4614fd6342ab69feebb067d5db84a9bfb9aada9f change-id: 20250515-qpic-snand-use-bitmasks-2030c19bbeb9 Best regards,