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[46.193.69.61]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a099b178absm19500236f8f.97.2025.05.08.00.10.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 May 2025 00:10:34 -0700 (PDT) From: Manivannan Sadhasivam Subject: [PATCH v4 0/5] PCI: Add support for resetting the slots in a platform specific way Date: Thu, 08 May 2025 12:40:29 +0530 Message-Id: <20250508-pcie-reset-slot-v4-0-7050093e2b50@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAOZYHGgC/3XNSw6DIBCA4asY1qVh8AF01Xs0XSAdlMSIAUPaG O9edGVjuvwnM98sJGJwGMmtWEjA5KLzY47qUhDT67FD6l65CWe8ZhWr6GQc0oARZxoHP1NRstZ qATpvkHw1BbTuvYuPZ+7exdmHz/4gwTb9byWgjCqpaq5Atlax++BGHfzVh45sWOIHAJozwDOAF kXTciENnIHyCIgzUGagVhqYBDCq4T/Auq5fm/p35DEBAAA= X-Change-ID: 20250404-pcie-reset-slot-730bfa71a202 To: Mahesh J Salgaonkar , Oliver O'Halloran , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Zhou Wang , Will Deacon , Robert Richter , Alyssa Rosenzweig , Marc Zyngier , Conor Dooley , Daire McNamara Cc: dingwei@marvell.com, cassel@kernel.org, Lukas Wunner , Krishna Chaitanya Chundru , linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, Manivannan Sadhasivam X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4736; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=LPKZpjoorPcJ0i3sy5Fe9gxmCowL7rHoa3+8Kx1k5I8=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBoHFjoZn2Vau5rBgSkqFonGWIjBD9vXqMQSpvxQ iz76V7WG0mJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCaBxY6AAKCRBVnxHm/pHO 9baVCACcMZ+oGHyyvjtszQkQwoCc4LQEhNyBVCLMAukrkzlHUKuJuUgMLxOaizVKaBzVqZ+ImAm KFJDCmiXyQNskAOrCdFyEWeHP2rLBoNzxWKTODzgJ8uppEcksqBFWh1rEl5psqx7nS58ivJfwBF 0IR7EBandYxRPofAprBmAyD/3pvvYcpIxlTilooBHNn2VzXduU0KYkSDDK5b4wJXryWat2+Mt8n BCAblJUCeBFK49eRl8FOHziOW4nIj4aSgX4clBB2igJ2YPjOa8wv2Ubvw1u6kDAMRQ1cSqP3A4B ktlGEOIB0nYlE+VSnH51tHJvblCq9bTJqJpTyBKZObEDWDGZ X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Hi, Currently, in the event of AER/DPC, PCI core will try to reset the slot and its subordinate devices by invoking bridge control reset and FLR. But in some cases like AER Fatal error, it might be necessary to reset the slots using the PCI host bridge drivers in a platform specific way (as indicated by the TODO in the pcie_do_recovery() function in drivers/pci/pcie/err.c). Otherwise, the PCI link won't be recovered successfully. So this series adds a new callback 'pci_host_bridge::reset_slot' for the host bridge drivers to reset the slot when a fatal error happens. Also, this series allows the host bridge drivers to handle PCI link down event by resetting the slots and recovering the bus. This is accomplished by the help of a new API 'pci_host_handle_link_down()'. Host bridge drivers are expected to call this API (preferrably from a threaded IRQ handler) when a link down event is detected. The API will reuse the pcie_do_recovery() function to recover the link if AER support is enabled, otherwise it will directly call the reset_slot() callback of the host bridge driver (if exists). For reference, I've modified the pcie-qcom driver to call pci_host_handle_link_down() after receiving LINK_DOWN global_irq event and populated the 'pci_host_bridge::reset_slot()' callback to reset the controller (there by slots). Since the Qcom PCIe controllers support only a single root port (slot) per controller instance, reset_slot() callback is going to be invoked only once. For multi root port controllers, this callback is supposed to identify the slots using the supplied 'pci_dev' pointer and reset them. NOTE ==== This series is a reworked version of the earlier series [1] that I submitted for handling PCI link down event. In this series, I've made use of the AER helpers to recover the link as it allows notifying the device drivers and also allows saving/restoring the config space. Testing ======= This series is tested on Qcom RB5 and SA8775p Ride boards by triggering the link down event manually by writing to LTSSM register. For the error recovery to succeed (if AER is enabled), all the drivers in the bridge hierarchy should have the 'err_handlers' populated. Otherwise, the link recovery will fail. [1] https://lore.kernel.org/linux-pci/20250221172309.120009-1-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam Reviewed-by: Lukas Wunner Tested-by: Wilfred Mallawa --- Changes in v4: - Handled link down first in the irq handler - Updated ICC & OPP bandwidth after link up in reset_slot() callback - Link to v3: https://lore.kernel.org/r/20250417-pcie-reset-slot-v3-0-59a10811c962@linaro.org Changes in v3: - Made the pci-host-common driver as a common library for host controller drivers - Moved the reset slot code to pci-host-common library - Link to v2: https://lore.kernel.org/r/20250416-pcie-reset-slot-v2-0-efe76b278c10@linaro.org Changes in v2: - Moved calling reset_slot() callback from pcie_do_recovery() to pcibios_reset_secondary_bus() - Link to v1: https://lore.kernel.org/r/20250404-pcie-reset-slot-v1-0-98952918bf90@linaro.org --- Manivannan Sadhasivam (5): PCI/ERR: Remove misleading TODO regarding kernel panic PCI/ERR: Add support for resetting the slots in a platform specific way PCI: host-common: Make the driver as a common library for host controller drivers PCI: host-common: Add link down handling for host bridges PCI: qcom: Add support for resetting the slot due to link down event drivers/pci/controller/Kconfig | 8 +- drivers/pci/controller/dwc/Kconfig | 1 + drivers/pci/controller/dwc/pcie-hisi.c | 1 + drivers/pci/controller/dwc/pcie-qcom.c | 112 ++++++++++++++++++++-- drivers/pci/controller/pci-host-common.c | 64 ++++++++++++- drivers/pci/controller/pci-host-common.h | 17 ++++ drivers/pci/controller/pci-host-generic.c | 2 + drivers/pci/controller/pci-thunder-ecam.c | 2 + drivers/pci/controller/pci-thunder-pem.c | 1 + drivers/pci/controller/pcie-apple.c | 2 + drivers/pci/controller/plda/pcie-microchip-host.c | 1 + drivers/pci/pci.c | 13 +++ drivers/pci/pcie/err.c | 7 +- include/linux/pci-ecam.h | 6 -- include/linux/pci.h | 1 + 15 files changed, 212 insertions(+), 26 deletions(-) --- base-commit: 08733088b566b58283f0f12fb73f5db6a9a9de30 change-id: 20250404-pcie-reset-slot-730bfa71a202 Best regards,