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Mon, 24 Mar 2025 20:29:43 GMT Received: from hu-molvera-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 24 Mar 2025 13:29:42 -0700 From: Melody Olvera Subject: [PATCH v3 0/4] Introduce LLCC v6 used on the SM8750 SoCs Date: Mon, 24 Mar 2025 13:29:36 -0700 Message-ID: <20250324-sm8750_llcc_master-v3-0-2afd5c0fdbde@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIALDA4WcC/23NywrCMBCF4VcpWRvJ1baufA+RkqSjHehFkxqU0 nc3LYIIXf4H5puJBPAIgRyziXiIGHDoU8hdRlxj+htQrFMTwYRmnOU0dEWuWdW2zlWdCSN4ao2 RNShlmbQkHd49XPG1oudL6gbDOPj3+iPyZf1yXG5xkVNGtSxKWwoQdW5Ojyc67N3eDR1ZwCh+i GRqExEJMaCAl6rU6gD/yDzPH+nrdWT7AAAA X-Change-ID: 20250107-sm8750_llcc_master-baa3de44b03b To: Bjorn Andersson , Konrad Dybcio , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Satya Durga Srinivasu Prabhala , Trilok Soni CC: , , , Melody Olvera , Conor Dooley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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LLCC v6 rearranges several registers and offsets and supports slice IDs over 31, so new functionality is necessary to program and use LLCC v6. --- Changes in v3: - Removed some unused variables. - Added parent/child grouping features to v6 - Updated cache data table with up-to-date configurations - Link to v2: https://lore.kernel.org/r/20250304-sm8750_llcc_master-v2-0-ae4e1949546e@quicinc.com Changes in v2: - moved v6 offsets into cfg struct - reverse xmas-treed variable declarations & removed unused - removed unneeded skip_llcc_cfg branch in v6 - updated some macros to use BITS, GENMASK, FIELD_PREP - moved LLCC_* definitions to appropriate patch - updated sm8750 slice data struct to match updated standard - fixed style on dt node - note: did not add cleanup patch to use bitfields - Link to v1: https://lore.kernel.org/r/20250113-sm8750_llcc_master-v1-0-5389b92e2d7a@quicinc.com --- Melody Olvera (4): dt-bindings: cache: qcom,llcc: Document SM8750 LLCC block soc: qcom: llcc-qcom: Add support for LLCC V6 soc: qcom: llcc-qcom: Add support for SM8750 arm64: dts: qcom: sm8750: Add LLCC node .../devicetree/bindings/cache/qcom,llcc.yaml | 2 + arch/arm64/boot/dts/qcom/sm8750.dtsi | 18 + drivers/soc/qcom/llcc-qcom.c | 496 ++++++++++++++++++++- include/linux/soc/qcom/llcc-qcom.h | 8 + 4 files changed, 520 insertions(+), 4 deletions(-) --- base-commit: 882a18c2c14fc79adb30fe57a9758283aa20efaa change-id: 20250107-sm8750_llcc_master-baa3de44b03b Best regards,