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Tue, 24 Dec 2024 00:46:31 -0800 (PST) X-Google-Smtp-Source: AGHT+IFx6N+BNVCJnCmEfHaE8WX8Zsoe41fiC374QBtCvPlMKHKhsQSSjWcfjL9+FH+eBLnuvq+wjg== X-Received: by 2002:a17:903:2306:b0:205:4721:19c with SMTP id d9443c01a7336-219e6f1448cmr197392315ad.37.1735029990976; Tue, 24 Dec 2024 00:46:30 -0800 (PST) Received: from hu-kriskura-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc9f692fsm85471195ad.216.2024.12.24.00.46.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Dec 2024 00:46:30 -0800 (PST) From: Krishna Kurapati To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Konrad Dybcio , Dmitry Baryshkov , Johan Hovold , Manivannan Sadhasivam , Varadarajan Narayanan , Wesley Cheng Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, quic_ppratap@quicinc.com, quic_jackp@quicinc.com, Krishna Kurapati Subject: [PATCH v3 0/3] Add support for USB controllers on QCS615 Date: Tue, 24 Dec 2024 14:16:18 +0530 Message-Id: <20241224084621.4139021-1-krishna.kurapati@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: o8Gnvt8BNH5nqDtI3tA9bk3wIYdA2Ksj X-Proofpoint-GUID: o8Gnvt8BNH5nqDtI3tA9bk3wIYdA2Ksj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 priorityscore=1501 phishscore=0 bulkscore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=999 clxscore=1015 adultscore=0 impostorscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412240072 This series aims at enabling USB on QCS615 which has 2 USB controllers. The primary controller is SuperSpeed capable and secondary one is High Speed only capable. The High Speed Phy is a QUSB2 phy and the SuperSpeed Phy is a QMP Uni Phy which supports non-concurrent DP. Link to v1: https://lore.kernel.org/all/20241014084432.3310114-1-quic_kriskura@quicinc.com/ Link to v2: https://lore.kernel.org/all/20241017130701.3301785-1-quic_kriskura@quicinc.com/ All the patches are acked. But some are merged and some don't apply clean. Phy bindings have been acked on v1 and have been merged from v1. The v2 DWC3 binding patch has been acked but conflicts with sar2130 code and hence v2-patch-1 doesn't apply cleanly. The QUSB2 phy driver changes in v2 conflict with IPQ changes that went in recently and hence v2-patch-4 doesn't apply cleanly. Changes in v3: Rebase on top of latest linux next to avoid conflicts. Updated mail ID from quicinc to OSS. So changed the SOBs and retained the ACKs since the author is still the same. Updated cover letter heading since the changes are for both ports and DT for first port is merged and second port is ACKed. Changes in v2: Addressed comments in v1 by using lowercase for reg values. Removed explicitly setting of struct params to false (as they are already false). Krishna Kurapati (3): dt-bindings: usb: qcom,dwc3: Add QCS615 to USB DWC3 bindings phy: qcom-qusb2: Add support for QCS615 phy: qcom: qmp-usbc: Add qmp configuration for QCS615 .../devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++ drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 3 +++ drivers/phy/qualcomm/phy-qcom-qusb2.c | 27 +++++++++++++++++++ 3 files changed, 33 insertions(+)