| Message ID | 20241010-dts_qcs615-v1-0-05f27f6ac4d3@quicinc.com |
|---|---|
| Headers | show |
| Series | Enable ethernet on qcs615 | expand |
On 10.10.2024 5:05 AM, Yijie Yang wrote: > Add ethqos ethernet controller node for QCS615 SoC. > > Signed-off-by: Yijie Yang <quic_yijiyang@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs615.dtsi | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi > index 0d8fb557cf48..ba737cd89679 100644 > --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi > @@ -420,6 +420,33 @@ soc: soc@0 { > #address-cells = <2>; > #size-cells = <2>; > > + ethernet: ethernet@20000 { > + compatible = "qcom,qcs615-ethqos", "qcom,sm8150-ethqos"; > + reg = <0x0 0x20000 0x0 0x10000>, > + <0x0 0x36000 0x0 0x100>; Please pad the address part to 8 hex digits with leading zeroes > + reg-names = "stmmaceth", "rgmii"; > + > + clocks = <&gcc GCC_EMAC_AXI_CLK>, > + <&gcc GCC_EMAC_SLV_AHB_CLK>, > + <&gcc GCC_EMAC_PTP_CLK>, > + <&gcc GCC_EMAC_RGMII_CLK>; > + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; Please make this a vertical list, just like clocks Konrad
On 2024-11-16 03:11, Konrad Dybcio wrote: > On 10.10.2024 5:05 AM, Yijie Yang wrote: >> Add ethqos ethernet controller node for QCS615 SoC. >> >> Signed-off-by: Yijie Yang <quic_yijiyang@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/qcs615.dtsi | 27 +++++++++++++++++++++++++++ >> 1 file changed, 27 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> index 0d8fb557cf48..ba737cd89679 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi >> @@ -420,6 +420,33 @@ soc: soc@0 { >> #address-cells = <2>; >> #size-cells = <2>; >> >> + ethernet: ethernet@20000 { >> + compatible = "qcom,qcs615-ethqos", "qcom,sm8150-ethqos"; >> + reg = <0x0 0x20000 0x0 0x10000>, >> + <0x0 0x36000 0x0 0x100>; > > Please pad the address part to 8 hex digits with leading zeroes > >> + reg-names = "stmmaceth", "rgmii"; >> + >> + clocks = <&gcc GCC_EMAC_AXI_CLK>, >> + <&gcc GCC_EMAC_SLV_AHB_CLK>, >> + <&gcc GCC_EMAC_PTP_CLK>, >> + <&gcc GCC_EMAC_RGMII_CLK>; >> + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; > > Please make this a vertical list, just like clocks Sure, I will revise. > > Konrad
Add dts nodes to enable ethernet interface on qcs615-ride platforms. This platform operates with RGMII interface and lacks SerDes. The EMAC and EPHY version are the same as those in sm8150. Signed-off-by: Yijie Yang <quic_yijiyang@quicinc.com> --- This patch series depends on below patch series: https://lore.kernel.org/all/20240926-add_initial_support_for_qcs615-v3-0-e37617e91c62@quicinc.com/ https://lore.kernel.org/all/20241010-schema-v1-0-98b2d0a2f7a2@quicinc.com/ --- Yijie Yang (2): arm64: dts: qcom: qcs615: add ethernet node arm64: dts: qcom: qcs615-ride: Enable ethernet node arch/arm64/boot/dts/qcom/qcs615-ride.dts | 105 +++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/qcs615.dtsi | 27 ++++++++ 2 files changed, 132 insertions(+) --- base-commit: 70c6ab36f8b7756260369952a3c13b3362034bd1 change-id: 20241010-dts_qcs615-d7fa4bc599e9 Best regards,