| Message ID | 20240716092347.2177153-1-quic_srichara@quicinc.com |
|---|---|
| Headers | show |
| Series | Add PCIe support for IPQ9574 | expand |
On 7/16/2024 5:33 PM, Konrad Dybcio wrote: > On 16.07.2024 11:23 AM, Sricharan R wrote: >> From: devi priya <quic_devipriy@quicinc.com> >> >> Add PCIe0, PCIe1, PCIe2, PCIe3 (and corresponding PHY) devices >> found on IPQ9574 platform. The PCIe0 & PCIe1 are 1-lane Gen3 >> host whereas PCIe2 & PCIe3 are 2-lane Gen3 host. >> >> Signed-off-by: devi priya <quic_devipriy@quicinc.com> >> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> >> --- > [...] > >> + >> + ranges = <0x01000000 0x0 0x00000000 0x10200000 0x0 0x100000>, /* I/O */ >> + <0x02000000 0x0 0x10300000 0x10300000 0x0 0x7d00000>; /* MEM */ > Drop these comments, please ok >> + >> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, >> + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; >> + > Inconsistent newline ok, will fix >> + interrupt-names = "msi0", >> + "msi1", >> + "msi2", >> + "msi3", >> + "msi4", >> + "msi5", >> + "msi6", >> + "msi7"; >> + >> + #interrupt-cells = <1>; >> + interrupt-map-mask = <0 0 0 0x7>; >> + interrupt-map = <0 0 0 1 &intc 0 0 35 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ >> + <0 0 0 2 &intc 0 0 49 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ >> + <0 0 0 3 &intc 0 0 84 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ >> + <0 0 0 4 &intc 0 0 85 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ > Drop these comments, please > > (all these comments apply to all the similar nodes) ok > [...] > >> + >> + pcie3: pcie@18000000 { >> + compatible = "qcom,pcie-ipq9574"; >> + reg = <0x18000000 0xf1d>, >> + <0x18000f20 0xa8>, >> + <0x18001000 0x1000>, >> + <0x000f0000 0x4000>, >> + <0x18100000 0x1000>; >> + reg-names = "dbi", "elbi", "atu", "parf", "config"; >> + device_type = "pci"; >> + linux,pci-domain = <4>; > Any reason the PCI domain for PCIeN is N+1? You can start at 0 ok, will fix Regards, Sricharan
On 7/17/2024 1:12 AM, Krzysztof Kozlowski wrote: > On 16/07/2024 11:23, Sricharan R wrote: >> From: devi priya <quic_devipriy@quicinc.com> >> >> Document the PCIe controller on IPQ9574 platform. > Subjects are without full stop. ok, will fix. > With that fixed: > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Thanks Regards, Sricharan
From: Sricharan Ramabadhran <quic_srichara@quicinc.com> This series adds support for enabling the PCIe host devices (PCIe0, PCIe1, PCIe2, PCIe3) found on IPQ9574 platform. The PCIe0 & PCIe1 are 1-lane Gen3 host and PCIe2 & PCIe3 are 2-lane Gen3 host. [V6] - Dropped patches [1] and [2] for clks, since its already merged. - Addressed all comments from Krzysztof, Manivannan, Bjorn Helgaas. Specifically dropped defining a new macro for SLV_ADDR_SPACE_SZ. Letting it at reset value is fine. Both dt_binding_check and dtbs_check passed and tested on ipq9574-rdp433 [1] - https://patchwork.kernel.org/project/linux-pci/patch/20240512082858.1806694-2-quic_devipriy@quicinc.com/ [2] - https://patchwork.kernel.org/project/linux-pci/patch/20240512082858.1806694-3-quic_devipriy@quicinc.com/ [V5] Change logs are added to the respective patches This series depends on the below series which adds support for Interconnect driver[1] and fetching clocks from the Device Tree[2] [1] - https://lore.kernel.org/linux-arm-msm/20240430064214.2030013-1-quic_varada@quicinc.com/ [2] - https://lore.kernel.org/linux-pci/20240417-pci-qcom-clk-bulk-v1-1-52ca19b3d6b2@linaro.org/ [V4] https://lore.kernel.org/linux-arm-msm/20230528142111.GC2814@thinkpad/ [V3] https://lore.kernel.org/linux-arm-msm/20230421124938.21974-1-quic_devipriy@quicinc.com/ - Dropped the phy driver and binding patches as they have been posted as a separate series. - Dropped the pinctrl binding fix patch as it is unrelated to the series dt-bindings: pinctrl: qcom: Add few missing functions. - Rebased on linux-next/master. - Detailed change logs are added to the respective patches. [V2] https://lore.kernel.org/linux-arm-msm/20230404164828.8031-1-quic_devipriy@quicinc.com/ - Reordered the patches and split the board DT changes into a separate patch as suggested - Detailed change logs are added to the respective patches [V1] https://lore.kernel.org/linux-arm-msm/20230214164135.17039-1-quic_devipriy@quicinc.com/ devi priya (4): dt-bindings: PCI: qcom: Document the IPQ9574 PCIe controller. arm64: dts: qcom: ipq9574: Add PCIe PHYs and controller nodes arm64: dts: qcom: ipq9574: Enable PCIe PHYs and controllers PCI: qcom: Add support for IPQ9574 .../devicetree/bindings/pci/qcom,pcie.yaml | 50 +++ arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 113 +++++ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 425 +++++++++++++++++- drivers/pci/controller/dwc/pcie-qcom.c | 31 +- 4 files changed, 611 insertions(+), 8 deletions(-) -- 2.34.1