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Fri, 17 May 2024 10:04:26 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 44HA4PtQ007975; Fri, 17 May 2024 10:04:25 GMT Received: from hu-devc-hyd-u20-c-new.qualcomm.com (hu-rohiagar-hyd.qualcomm.com [10.147.246.70]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 44HA4Pn6007972 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 May 2024 10:04:25 +0000 Received: by hu-devc-hyd-u20-c-new.qualcomm.com (Postfix, from userid 3970568) id A28BE21015; Fri, 17 May 2024 15:34:24 +0530 (+0530) From: Rohit Agarwal To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org Cc: linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rohit Agarwal Subject: [PATCH 0/2] Add I2C and SPI busses for SDX75 Date: Fri, 17 May 2024 15:34:21 +0530 Message-Id: <20240517100423.2006022-1-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: D-bLCE5EGkZvujdjKhdNKaqTT8mbiryy X-Proofpoint-ORIG-GUID: D-bLCE5EGkZvujdjKhdNKaqTT8mbiryy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-17_03,2024-05-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 lowpriorityscore=0 mlxlogscore=605 clxscore=1011 bulkscore=0 priorityscore=1501 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405170080 Hi, This series adds the I2C and SPI busses found on the Qcom's SoC SDX75. Thanks, Rohit. Rohit Agarwal (2): dt-bindings: dma: qcom,gpi: document the SDX75 GPI DMA Engine arm64: dts: qcom: sdx75: Support for I2C and SPI .../devicetree/bindings/dma/qcom,gpi.yaml | 1 + arch/arm64/boot/dts/qcom/sdx75.dtsi | 431 ++++++++++++++++++ 2 files changed, 432 insertions(+)