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Mon, 08 Apr 2024 04:47:10 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id g17-20020a19e051000000b005158ddab172sm1175549lfj.19.2024.04.08.04.47.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 04:47:10 -0700 (PDT) From: Dmitry Baryshkov Subject: [PATCH 0/4] clk: qcom: dispcc: fix DisplayPort link clocks Date: Mon, 08 Apr 2024 14:47:03 +0300 Message-Id: <20240408-dispcc-dp-clocks-v1-0-f9e44902c28d@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIADfZE2YC/x3MMQqAMAxA0atIZgO1tqJeRRwkjRoULQ2IIN7d4 viG/x9QTsIKffFA4ktUziOjKgugdToWRgnZYI11xpkWg2gkwhCR9pM2Rc/sg+9sU7sGchYTz3L /y2F83w8NdG7WYgAAAA== To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Konrad Dybcio , Konrad Dybcio , Neil Armstrong Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1026; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=OCw+xQuh4YdbSILqfvpnzJNXOmcv3tKcqjIMouYgamo=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmE9k9b0mmAcS/8Pu/Mvcy8UXWn7UUtjIBH2yqj sc6FktUi+qJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZhPZPQAKCRCLPIo+Aiko 1TdVB/48GnfmnOEjLURRPoOvYCacC0pISv+HUdjl9KVcguBdrCBP1vh+uMOnLwGutnsMiKhSVuM KBF3dPKy+0QtA1KPIKxFBR1LMMGX4ESGRBNVVyljSbRcyOL6+4ZV7ThHUGMbAbEu33YpOCiHB+g 8zp/QODqCdyemKVVQuwhaQaKcpYon9kMcd1PzKj2jAgZe644jGWXFtU8XCF3cbuS89OmFwu+H69 pj4WmlQ8oMU5SANfZMViiv2hO5IDy1ZvJxIWUjsY7qjQmT53ymEAuZtQabqEK1XAkt5WhTvKFaD NFRGXeHKEDKfvIwqPTqvseT8ii+QvCSCpqk58qfnIZIoOYuX X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A On several Qualcomm platforms DisplayPort link clocks used incorrect frequency tables. Drop frequency tables and use clk_byte2_ops instead of clk_rcg2_ops. Note, this was tested on SM8450 only and then extended to other platforms. Signed-off-by: Dmitry Baryshkov --- Dmitry Baryshkov (4): clk: qcom: dispcc-sm8450: fix DisplayPort clocks clk: qcom: dispcc-sm6350: fix DisplayPort clocks clk: qcom: dispcc-sm8550: fix DisplayPort clocks clk: qcom: dispcc-sm8650: fix DisplayPort clocks drivers/clk/qcom/dispcc-sm6350.c | 11 +---------- drivers/clk/qcom/dispcc-sm8450.c | 20 ++++---------------- drivers/clk/qcom/dispcc-sm8550.c | 20 ++++---------------- drivers/clk/qcom/dispcc-sm8650.c | 20 ++++---------------- 4 files changed, 13 insertions(+), 58 deletions(-) --- base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc change-id: 20240408-dispcc-dp-clocks-5ee5d5926346 Best regards,