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Thu, 29 Feb 2024 05:07:11 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id t7-20020a05600c198700b00412a38e732csm2071473wmq.35.2024.02.29.05.07.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Feb 2024 05:07:10 -0800 (PST) From: Neil Armstrong Subject: [PATCH RFT 0/7] arm64: qcom: allow up to 4 lanes for the Type-C DisplayPort Altmode Date: Thu, 29 Feb 2024 14:07:00 +0100 Message-Id: <20240229-topic-sm8x50-upstream-phy-combo-typec-mux-v1-0-07e24a231840@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAHSB4GUC/x2NQQrCMBAAv1L27EKSWrA+wAdIb+KhjavdQ5olm 0pK6d8NMqe5zOyglJgUrs0Oib6sHJcq9tSAn8flQ8iv6uCMOxvnesxR2KOGS+kMrqI50RhQ5g1 9DFPEvAl5DGvB1k6dq9jW91B7kujN5f96wP02wPM4fuclkP+AAAAA To: Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Register a typec mux in order to change the PHY mode on the Type-C mux events depending on the mode and the svid when in Altmode setup. The DisplayPort phy should be left enabled if is still powered on by the DRM DisplayPort controller, so bail out until the DisplayPort PHY is not powered off. The Type-C Mode/SVID only changes on plug/unplug, and USB SAFE states will be set in between of USB-Only, Combo and DisplayPort Only so this will leave enough time to the DRM DisplayPort controller to turn of the DisplayPort PHY. The patchset also includes bindings changes and DT changes. This has been successfully tested on an SM8550 board, but the Thinkpad X13s deserved testing between non-PD USB, non-PD DisplayPort, PD USB Hubs and PD Altmode Dongles to make sure the switch works as expected. The DisplayPort 4 lanes setup can be check with: $ cat /sys/kernel/debug/dri/ae01000.display-controller/DP-1/dp_debug name = msm_dp drm_dp_link rate = 540000 num_lanes = 4 ... Signed-off-by: Neil Armstrong --- Neil Armstrong (7): dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Add mode-switch phy: qcom: qmp-combo: store DP phy power state phy: qcom: qmp-combo: introduce QPHY_MODE phy: qcom: qmp-combo: register a typec mux to change the QPHY_MODE arm64: dts: qcom-sm8550: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch arm64: dts: qcom-sm8650: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch arm64: dts: qcom-mode-switch: allow 4 lanes for DisplayPort and enable QMP PHY mode-switch .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 5 + .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 6 +- arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 3 +- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 3 +- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 3 +- drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 168 +++++++++++++++++++-- 6 files changed, 173 insertions(+), 15 deletions(-) --- base-commit: b321c0e8ca754d8cd9f23ceba958e3ea93c6519e change-id: 20240229-topic-sm8x50-upstream-phy-combo-typec-mux-31b5252513c9 Best regards,