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Tue, 20 Feb 2024 19:42:06 -0800 (PST) Received: from [127.0.1.1] ([117.207.28.224]) by smtp.gmail.com with ESMTPSA id o23-20020a056a001b5700b006e466369645sm4436231pfv.132.2024.02.20.19.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Feb 2024 19:42:05 -0800 (PST) From: Manivannan Sadhasivam Subject: [PATCH 00/21] Add PCIe bridge node in DT for Qcom SoCs Date: Wed, 21 Feb 2024 09:11:46 +0530 Message-Id: <20240221-pcie-qcom-bridge-dts-v1-0-6c6df0f9450d@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAPpw1WUC/x2MQQqAIBAAvxJ7bkG3iOgr0SF1qz2kpRFB+Pek4 zDMvJA4CicYqhci35Ik+AK6rsBus18ZxRUGUtQqIo2HFcbThh1NFFe8uxKavrHKadO1ZKCkR+R Fnn87Tjl/cL0lwGYAAAA= To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3470; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=7t1TKV9oHfbtypKrfVlUmm8Y14s1NVoXY+RaFYePMs8=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl1XEEYatcc8RMyWl8SiVwWPQdvD40KPKZCCb++ +YlZMuarcSJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZdVxBAAKCRBVnxHm/pHO 9Wa1B/4t8wor+IpWnGsAKtfPraFtKhtykFbOPAduWKydRWAIHMDbFk/F2ZO80V3f6UHLNziP+Nx Mti7xN+w6n524Z8wv8YQc2W+u85wGRfWeyaDVrn0BCLWNvpOHycleiwE/H4ZEOqI9bHrXawwJe3 F/7cMJ/sxHPMY25An+6rXejMeHXqssR3lfkhWaSI1dMCADypgCct+ijD6ABy1ZtOj/vvrUxM52N ZwDucCBS1vJcYmDWCvdftMCD8zRp5dsHXBg7bxeBfBAMKOVXD/9gwr6Q1krNQns2Wh76NUdSJZT Js8Exxh2EIv2N5apNdCalkG9I0bDnL7x2zNWnUk51+7GgJaP X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge for each controller instance. Hence, this series adds a DT node for the PCIe bridges across all SoCs. There is no functionality change with this series, but the PCIe bridge representation in DT will be necessary to add the DT node for the client devices like the one proposed in power sequencing series [1]. - Mani [1] https://lore.kernel.org/linux-arm-msm/20240216203215.40870-8-brgl@bgdev.pl/ Signed-off-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Neil Armstrong --- Manivannan Sadhasivam (21): arm64: dts: qcom: sm8250: Add PCIe bridge node arm64: dts: qcom: sdm845: Add PCIe bridge node arm64: dts: qcom: sm8150: Add PCIe bridge node arm64: dts: qcom: sm8350: Add PCIe bridge node arm64: dts: qcom: sm8450: Add PCIe bridge node arm64: dts: qcom: sm8550: Add PCIe bridge node arm64: dts: qcom: sm8650: Add PCIe bridge node arm64: dts: qcom: sa8775p: Add PCIe bridge node arm64: dts: qcom: sc8280xp: Add PCIe bridge node arm64: dts: qcom: msm8998: Add PCIe bridge node arm64: dts: qcom: sc7280: Add PCIe bridge node arm64: dts: qcom: qcs404: Add PCIe bridge node arm64: dts: qcom: sc8180x: Add PCIe bridge node arm64: dts: qcom: msm8996: Add PCIe bridge node arm64: dts: qcom: ipq8074: Add PCIe bridge node arm64: dts: qcom: ipq6018: Add PCIe bridge node ARM: dts: qcom: ipq8064: Add PCIe bridge node ARM: dts: qcom: ipq4019: Add PCIe bridge node ARM: dts: qcom: apq8064: Add PCIe bridge node ARM: dts: qcom: sdx55: Add PCIe bridge node arm64: dts: qcom: sm8650: Use "pcie" as the node name instead of "pci" arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 10 ++++++ arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 10 ++++++ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 30 ++++++++++++++++ arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 10 ++++++ arch/arm64/boot/dts/qcom/ipq6018.dtsi | 10 ++++++ arch/arm64/boot/dts/qcom/ipq8074.dtsi | 20 +++++++++++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 30 ++++++++++++++++ arch/arm64/boot/dts/qcom/msm8998.dtsi | 10 ++++++ arch/arm64/boot/dts/qcom/qcs404.dtsi | 10 ++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 20 +++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 ++++++ arch/arm64/boot/dts/qcom/sc8180x.dtsi | 40 ++++++++++++++++++++++ .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 8 ----- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 40 ++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 20 +++++++++++ arch/arm64/boot/dts/qcom/sm8150.dtsi | 20 +++++++++++ arch/arm64/boot/dts/qcom/sm8250.dtsi | 30 ++++++++++++++++ arch/arm64/boot/dts/qcom/sm8350.dtsi | 20 +++++++++++ arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 +++++++++++ arch/arm64/boot/dts/qcom/sm8550.dtsi | 20 +++++++++++ arch/arm64/boot/dts/qcom/sm8650.dtsi | 24 +++++++++++-- 21 files changed, 402 insertions(+), 10 deletions(-) --- base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d change-id: 20240221-pcie-qcom-bridge-dts-b83c0d1b642b Best regards,