| Message ID | 20240216-dw-hdma-v2-0-b42329003f43@linaro.org |
|---|---|
| Headers | show |
| Series | PCI: dwc: Add support for integrating HDMA with DWC EP driver | expand |
On 24/02/16 11:04PM, Manivannan Sadhasivam wrote: > In order to add support for Hyper DMA (HDMA), let's refactor the existing > dw_pcie_edma_find_chip() API by moving the common code to separate > functions. > > No functional change. > > Suggested-by: Serge Semin <fancer.lancer@gmail.com> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/pci/controller/dwc/pcie-designware.c | 40 +++++++++++++++++++++++----- > 1 file changed, 33 insertions(+), 7 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index 250cf7f40b85..3a26dfc5368f 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -880,7 +880,17 @@ static struct dw_edma_plat_ops dw_pcie_edma_ops = { > .irq_vector = dw_pcie_edma_irq_vector, > }; > > -static int dw_pcie_edma_find_chip(struct dw_pcie *pci) > +static void dw_pcie_edma_init_data(struct dw_pcie *pci) > +{ > + pci->edma.dev = pci->dev; > + > + if (!pci->edma.ops) > + pci->edma.ops = &dw_pcie_edma_ops; > + > + pci->edma.flags |= DW_EDMA_CHIP_LOCAL; > +} > + > +static int dw_pcie_edma_find_mf(struct dw_pcie *pci) > { > u32 val; > > @@ -902,8 +912,6 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci) > > if (val == 0xFFFFFFFF && pci->edma.reg_base) { > pci->edma.mf = EDMA_MF_EDMA_UNROLL; > - > - val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > } else if (val != 0xFFFFFFFF) { > pci->edma.mf = EDMA_MF_EDMA_LEGACY; Minor suggestion: The above section prior to this patch was: if (val == 0xFFFFFFFF && pci->edma.reg_base) { pci->edma.mf = EDMA_MF_EDMA_UNROLL; val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); } else if (val != 0xFFFFFFFF) { pci->edma.mf = EDMA_MF_EDMA_LEGACY; pci->edma.reg_base = pci->dbi_base + PCIE_DMA_VIEWPORT_BASE; } else { return -ENODEV; } And this patch is removing the call to dw_pcie_readl_dma() in the "if" condition above. So the curly braces after this patch will only be present because of the "else if" statement. So is the following change a good idea? /* Assume it is EDMA_LEGACY by default but update it later if needed */ pci->edma.mf = EDMA_MF_EDMA_LEGACY; if (val == 0xFFFFFFFF && pci->edma.reg_base) pci->edma.mf = EDMA_MF_EDMA_UNROLL; else if (val != 0xFFFFFFFF) pci->edma.reg_base = pci->dbi_base + PCIE_DMA_VIEWPORT_BASE; else return -ENODEV; Regards, Siddharth.
On 24/02/16 11:04PM, Manivannan Sadhasivam wrote: > Instead of maintaining a separate capability for glue drivers that cannot > support auto detection of the eDMA mapping format, let's pass the mapping > format directly from them. > > This will simplify the code and also allow adding HDMA support that also > doesn't support auto detection of mapping format. > > Suggested-by: Serge Semin <fancer.lancer@gmail.com> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Regards, Siddharth. > --- > drivers/pci/controller/dwc/pcie-designware.c | 16 +++++++++------- > drivers/pci/controller/dwc/pcie-designware.h | 5 ++--- > drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +- > 3 files changed, 12 insertions(+), 11 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > index d07747b75947..54ecd536756d 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -894,18 +894,20 @@ static int dw_pcie_edma_find_mf(struct dw_pcie *pci) > { > u32 val; > > + /* > + * Bail out finding the mapping format if it is already set by the glue > + * driver. Also ensure that the edma.reg_base is pointing to a valid > + * memory region. > + */ > + if (pci->edma.mf != EDMA_MF_EDMA_LEGACY) > + return pci->edma.reg_base ? 0 : -ENODEV; > + > /* > * Indirect eDMA CSRs access has been completely removed since v5.40a > * thus no space is now reserved for the eDMA channels viewport and > * former DMA CTRL register is no longer fixed to FFs. > - * > - * Note that Renesas R-Car S4-8's PCIe controllers for unknown reason > - * have zeros in the eDMA CTRL register even though the HW-manual > - * explicitly states there must FFs if the unrolled mapping is enabled. > - * For such cases the low-level drivers are supposed to manually > - * activate the unrolled mapping to bypass the auto-detection procedure. > */ > - if (dw_pcie_ver_is_ge(pci, 540A) || dw_pcie_cap_is(pci, EDMA_UNROLL)) > + if (dw_pcie_ver_is_ge(pci, 540A)) > val = 0xFFFFFFFF; > else > val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL); > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index 26dae4837462..995805279021 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -51,9 +51,8 @@ > > /* DWC PCIe controller capabilities */ > #define DW_PCIE_CAP_REQ_RES 0 > -#define DW_PCIE_CAP_EDMA_UNROLL 1 > -#define DW_PCIE_CAP_IATU_UNROLL 2 > -#define DW_PCIE_CAP_CDM_CHECK 3 > +#define DW_PCIE_CAP_IATU_UNROLL 1 > +#define DW_PCIE_CAP_CDM_CHECK 2 > > #define dw_pcie_cap_is(_pci, _cap) \ > test_bit(DW_PCIE_CAP_ ## _cap, &(_pci)->caps) > diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c > index e9166619b1f9..3c535ef5ea91 100644 > --- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c > +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c > @@ -255,7 +255,7 @@ static struct rcar_gen4_pcie *rcar_gen4_pcie_alloc(struct platform_device *pdev) > rcar->dw.ops = &dw_pcie_ops; > rcar->dw.dev = dev; > rcar->pdev = pdev; > - dw_pcie_cap_set(&rcar->dw, EDMA_UNROLL); > + rcar->dw.edma.mf = EDMA_MF_EDMA_UNROLL; > dw_pcie_cap_set(&rcar->dw, REQ_RES); > platform_set_drvdata(pdev, rcar); > > > -- > 2.25.1 > >
On 24/02/16 11:04PM, Manivannan Sadhasivam wrote: > From: Mrinmay Sarkar <quic_msarkar@quicinc.com> > > SA8775P SoC supports Hyper DMA (HDMA) DMA Engine present in the DWC IP. So, > let's enable it in the EPF driver so that the DMA Engine APIs can be used > for data transfer. > > Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com> > [mani: reworded commit message] > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Regards, Siddharth. > --- > drivers/pci/endpoint/functions/pci-epf-mhi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c > index 2c54d80107cf..570c1d1fb12e 100644 > --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c > +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c > @@ -137,6 +137,7 @@ static const struct pci_epf_mhi_ep_info sa8775p_info = { > .epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32, > .msi_count = 32, > .mru = 0x8000, > + .flags = MHI_EPF_USE_DMA, > }; > > struct pci_epf_mhi { > > -- > 2.25.1 > >
On Tue, Feb 20, 2024 at 05:41:41PM +0530, Siddharth Vadapalli wrote: > On 24/02/16 11:04PM, Manivannan Sadhasivam wrote: > > In order to add support for Hyper DMA (HDMA), let's refactor the existing > > dw_pcie_edma_find_chip() API by moving the common code to separate > > functions. > > > > No functional change. > > > > Suggested-by: Serge Semin <fancer.lancer@gmail.com> > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > drivers/pci/controller/dwc/pcie-designware.c | 40 +++++++++++++++++++++++----- > > 1 file changed, 33 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c > > index 250cf7f40b85..3a26dfc5368f 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware.c > > +++ b/drivers/pci/controller/dwc/pcie-designware.c > > @@ -880,7 +880,17 @@ static struct dw_edma_plat_ops dw_pcie_edma_ops = { > > .irq_vector = dw_pcie_edma_irq_vector, > > }; > > > > -static int dw_pcie_edma_find_chip(struct dw_pcie *pci) > > +static void dw_pcie_edma_init_data(struct dw_pcie *pci) > > +{ > > + pci->edma.dev = pci->dev; > > + > > + if (!pci->edma.ops) > > + pci->edma.ops = &dw_pcie_edma_ops; > > + > > + pci->edma.flags |= DW_EDMA_CHIP_LOCAL; > > +} > > + > > +static int dw_pcie_edma_find_mf(struct dw_pcie *pci) > > { > > u32 val; > > > > @@ -902,8 +912,6 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci) > > > > if (val == 0xFFFFFFFF && pci->edma.reg_base) { > > pci->edma.mf = EDMA_MF_EDMA_UNROLL; > > - > > - val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > > } else if (val != 0xFFFFFFFF) { > > pci->edma.mf = EDMA_MF_EDMA_LEGACY; > > Minor suggestion: > > The above section prior to this patch was: > if (val == 0xFFFFFFFF && pci->edma.reg_base) { > pci->edma.mf = EDMA_MF_EDMA_UNROLL; > > val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL); > } else if (val != 0xFFFFFFFF) { > pci->edma.mf = EDMA_MF_EDMA_LEGACY; > > pci->edma.reg_base = pci->dbi_base + PCIE_DMA_VIEWPORT_BASE; > } else { > return -ENODEV; > } > > And this patch is removing the call to dw_pcie_readl_dma() in the "if" > condition above. So the curly braces after this patch will only be > present because of the "else if" statement. So is the following change a > good idea? > Yes indeed. Actually, EDMA_MF_EDMA_LEGACY is the default mapping format (because its value is 0x0), but setting it explicitly would also make sense. - Mani
Hello, This series adds support for integrating HDMA with the DWC EP driver. Hyper DMA (HDMA) is already supported by the dw-edma dmaengine driver. Unlike it's predecessor Embedded DMA (eDMA), HDMA supports only unroll mapping format and doesn't support auto detecting the read/write channels. Hence, this series modifies the existing eDMA code to work with HDMA by honoring the platform supplied mapping format and read/write channels count. The platform drivers making use of HDMA should pass the EDMA_MF_HDMA_NATIVE flag and provide channels count. In this series, HDMA support is added for the Qcom SA8775P SoC and the DMA support in enabled in MHI EPF driver as well. Testing ------- Tested on Qualcomm SA8775P Ride board. Dependency ---------- Depends on: https://lore.kernel.org/dmaengine/20240129-b4-feature_hdma_mainline-v7-0-8e8c1acb7a46@bootlin.com/ https://lore.kernel.org/all/1701432377-16899-1-git-send-email-quic_msarkar@quicinc.com/ NOTE: I've taken over this series from Mrinmay who posted v1: https://lore.kernel.org/linux-pci/1705669223-5655-1-git-send-email-quic_msarkar@quicinc.com/ - Mani Changes in v2: - Dropped dmaengine patches (Sergey) - Reworked dw_pcie_edma_find_chip() to support both eDMA and HDMA (Sergey) - Skipped MF and channel detection if glue drivers have provided them (Sergey) - Addressed review comments in pcie-qcom-ep and pci-epf-mhi drivers (Mani) Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- Manivannan Sadhasivam (3): PCI: dwc: Refactor dw_pcie_edma_find_chip() API PCI: dwc: Skip finding eDMA channels count if glue drivers have passed them PCI: dwc: Pass the eDMA mapping format flag directly from glue drivers Mrinmay Sarkar (2): PCI: qcom-ep: Add HDMA support for SA8775P SoC PCI: epf-mhi: Enable HDMA for SA8775P SoC drivers/pci/controller/dwc/pcie-designware.c | 62 +++++++++++++++++++++------- drivers/pci/controller/dwc/pcie-designware.h | 5 +-- drivers/pci/controller/dwc/pcie-qcom-ep.c | 23 ++++++++++- drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +- drivers/pci/endpoint/functions/pci-epf-mhi.c | 1 + 5 files changed, 72 insertions(+), 21 deletions(-) --- base-commit: fdd10aee7740a53c370a867b8743a8c8945d1db1 change-id: 20240216-dw-hdma-64ddc09fb30b Best regards,