| Message ID | 20231203003203.1293087-1-dmitry.baryshkov@linaro.org |
|---|---|
| Headers | show |
| Series | drm/msm/dpu: enable writeback on the other platforms | expand |
On 12/11/2023 10:23 PM, Dmitry Baryshkov wrote: > On Tue, 12 Dec 2023 at 02:30, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: >> >> >> >> On 12/2/2023 4:31 PM, Dmitry Baryshkov wrote: >>> I was not able to test it on my own, this is a call for testing for the >>> owners of these platforms. The git version of modetest now fully >>> supports writeback. >>> >>> Use libdrm >= 2.4.117, run modetest -ac to determine the writeback >>> connector, cat /sys/kernel/debug/dri/0/state to determine >>> spare CRTC and plane, then run something like: >>> >>> modetest -M msm -a -s 36@85:1024x768 -o test.d -P 79@85:1024x768 >>> >>> where 36 is the Writeback connector id, 85 is CRTC and 79 is the plane. >>> >>> Then press Enter and check the test.d file for the raw image dump. >>> >>> Changes since v1: >>> - Fixed the DPU_CLK_CTRL_WB2 definition >>> >> >> I think this series needs to be re-based as WB_SDM845_MASK is no longer >> present in msm-next and 3/4 patches in this series use that. > > Quite the contrary: the WB_SDM845_MASK was added in > https://patchwork.freedesktop.org/patch/570189/?series=127245&rev=1, > which is now merged to msm-next-lumag > Ah okay, I was comparing against msm-next. Let me complete rest of the review checking the other branch. >> >>> Dmitry Baryshkov (4): >>> drm/msm/dpu: enable writeback on SM8150 >>> drm/msm/dpu: enable writeback on SC8108X >>> drm/msm/dpu: enable writeback on SM6125 >>> drm/msm/dpu: enable writeback on SM6350 >>> >>> .../drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 18 ++++++++++++++++++ >>> .../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 18 ++++++++++++++++++ >>> .../drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 18 ++++++++++++++++++ >>> .../drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 18 ++++++++++++++++++ >>> 4 files changed, 72 insertions(+) >>> > > >
On 12/2/2023 4:32 PM, Dmitry Baryshkov wrote: > Enable WB2 hardware block, enabling writeback support on this platform. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > .../drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h > index 9392ad2b4d3f..62deedb206b4 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h > @@ -34,6 +34,7 @@ static const struct dpu_mdp_cfg sm8150_mdp = { > [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 }, > [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 }, > [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 }, > + [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 }, > }, > }; > > @@ -291,6 +292,21 @@ static const struct dpu_dsc_cfg sm8150_dsc[] = { > }, > }; > > +static const struct dpu_wb_cfg sm8150_wb[] = { > + { > + .name = "wb_2", .id = WB_2, > + .base = 0x65000, .len = 0x2c8, > + .features = WB_SDM845_MASK, > + .format_list = wb2_formats, > + .num_formats = ARRAY_SIZE(wb2_formats), This should now be wb2_formats_rgb. With that fixed, Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > + .clk_ctrl = DPU_CLK_CTRL_WB2, > + .xin_id = 6, > + .vbif_idx = VBIF_RT, > + .maxlinewidth = 4096, > + .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4), > + }, > +}; > + > static const struct dpu_intf_cfg sm8150_intf[] = { > { > .name = "intf_0", .id = INTF_0, > @@ -385,6 +401,8 @@ const struct dpu_mdss_cfg dpu_sm8150_cfg = { > .pingpong = sm8150_pp, > .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), > .merge_3d = sm8150_merge_3d, > + .wb_count = ARRAY_SIZE(sm8150_wb), > + .wb = sm8150_wb, > .intf_count = ARRAY_SIZE(sm8150_intf), > .intf = sm8150_intf, > .vbif_count = ARRAY_SIZE(sdm845_vbif),
On 12/2/2023 4:32 PM, Dmitry Baryshkov wrote: > Enable WB2 hardware block, enabling writeback support on this platform. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > .../drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h > index cec7af6667dc..79fca229df18 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h > @@ -27,6 +27,7 @@ static const struct dpu_mdp_cfg sm6125_mdp = { > [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 }, > [DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 }, > [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 }, > + [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 }, > }, > }; > > @@ -139,6 +140,21 @@ static const struct dpu_pingpong_cfg sm6125_pp[] = { > }, > }; > > +static const struct dpu_wb_cfg sm6125_wb[] = { > + { > + .name = "wb_2", .id = WB_2, > + .base = 0x65000, .len = 0x2c8, > + .features = WB_SDM845_MASK, > + .format_list = wb2_formats, > + .num_formats = ARRAY_SIZE(wb2_formats), > + .clk_ctrl = DPU_CLK_CTRL_WB2, This should now be wb2_formats_rgb. With that fixed, Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > + .xin_id = 6, > + .vbif_idx = VBIF_RT, > + .maxlinewidth = 2160, > + .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4), > + }, > +}; > + > static const struct dpu_intf_cfg sm6125_intf[] = { > { > .name = "intf_0", .id = INTF_0, > @@ -210,6 +226,8 @@ const struct dpu_mdss_cfg dpu_sm6125_cfg = { > .dspp = sm6125_dspp, > .pingpong_count = ARRAY_SIZE(sm6125_pp), > .pingpong = sm6125_pp, > + .wb_count = ARRAY_SIZE(sm6125_wb), > + .wb = sm6125_wb, > .intf_count = ARRAY_SIZE(sm6125_intf), > .intf = sm6125_intf, > .vbif_count = ARRAY_SIZE(sdm845_vbif),