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[83.9.2.185]) by smtp.gmail.com with ESMTPSA id j20-20020ac253b4000000b004fbdba4b075sm1861679lfh.57.2023.08.08.04.43.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Aug 2023 04:43:34 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH v3 00/10] Fix up icc clock rate calculation on some platforms Date: Tue, 08 Aug 2023 13:43:31 +0200 Message-Id: <20230726-topic-icc_coeff-v3-0-dee684d6cdd2@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAGMq0mQC/4WNywrCMBQFf6VkbSQPm7au/A8RSW4Te6EkJalBK f130+5ciMs5cGYWkmxEm8i5Wki0GRMGX0AeKgKD9g9LsS9MBBOSNULROUwIFAHuEKxz1LBa9vW JdaZzpLyMTpaaqD0M5eef41jGKVqHrz1zvRUeMM0hvvdq5tv6O5A5ZVRyxVWnWMtbuIzodQzHE B9kk2XxRyCKoIWOg4JGsUZ9CdZ1/QC5gVttBQEAAA== To: Andy Gross , Bjorn Andersson , Georgi Djakov , Michael Turquette , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1691495013; l=2722; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=XAhr1GRTTz11VXNGM0HJcweTRyuP6Ic8MAO173kSZZo=; b=uU3qPRoERGY/xei0GUD/LmqbFzELs1Kt4lOdOOMFgQzXC/ob46KMRct1oyF2A/us51ZC0pd+d 4CWXccEf7nzCol5TgXFeAIurv4W1u961WTfupsjOxliRUIydPuFqn7E X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Certain platforms require that some buses (or individual nodes) make some additional changes to the clock rate formula, throwing in some magic, Qualcomm-defined coefficients, to account for "inefficiencies". Add the framework for it and utilize it on a couple SoCs. Signed-off-by: Konrad Dybcio --- Changes in v3: - Allocate the node bus clock on the stack, as dynamically allocating it actually wastes memory on systems with 64-bit pointers.. - Add the node bus clock struct member in the correct patch - Simplify using coefficients by only checking the node-level ones, and setting them equal to the bus-specific ones at probe if absent - Fix building on arm32 - Mention some references to the related downstream code - Link to v2: https://lore.kernel.org/r/20230726-topic-icc_coeff-v2-0-8c91c6c76076@linaro.org Changes in v2: - Use the (arguably less favourable but necessary for precission) 100/x instead of x/100 for ib coefficient, update values in consequent patches to reflect that - Rename "_percent" to "_coeff" because of /\ - Add the necessary code to support per-node clocks - Add the necessary code to support per-node coefficients - Hook up the CPUSS<->GNoC clock on QCM2290 - Update EBI node on QCM2290 - Link to v1: https://lore.kernel.org/r/20230726-topic-icc_coeff-v1-0-31616960818c@linaro.org --- Konrad Dybcio (10): interconnect: qcom: icc-rpm: Add AB/IB calculations coefficients interconnect: qcom: icc-rpm: Separate out clock rate calulcations interconnect: qcom: icc-rpm: Let nodes drive their own bus clock interconnect: qcom: icc-rpm: Check for node-specific rate coefficients interconnect: qcom: qcm2290: Hook up MAS_APPS_PROC's bus clock interconnect: qcom: qcm2290: Set AB coefficients interconnect: qcom: qcm2290: Update EBI channel configuration interconnect: qcom: sdm660: Set AB/IB coefficients interconnect: qcom: msm8996: Set AB/IB coefficients clk: qcom: smd-rpm: Move CPUSS_GNoC clock to interconnect drivers/clk/qcom/clk-smd-rpm.c | 16 +++++-- drivers/interconnect/qcom/icc-rpm-clocks.c | 6 +++ drivers/interconnect/qcom/icc-rpm.c | 76 +++++++++++++++++++++++++----- drivers/interconnect/qcom/icc-rpm.h | 15 ++++++ drivers/interconnect/qcom/msm8996.c | 8 +++- drivers/interconnect/qcom/qcm2290.c | 9 +++- drivers/interconnect/qcom/sdm660.c | 4 ++ 7 files changed, 115 insertions(+), 19 deletions(-) --- base-commit: 71cd4fc492ec41e4acd85e98bbf7a13753fc1e03 change-id: 20230726-topic-icc_coeff-b053d5409b9f Best regards,