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[83.9.30.82]) by smtp.gmail.com with ESMTPSA id m25-20020a056512015900b004fb86c89fa1sm753363lfo.135.2023.06.28.13.35.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Jun 2023 13:35:25 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH 00/14] A7xx support Date: Wed, 28 Jun 2023 22:35:00 +0200 Message-Id: <20230628-topic-a7xx_drmmsm-v1-0-a7f4496e0c12@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAHSZnGQC/x2N0QrDIAwAf6XkeQGrUMd+ZYxhNa6BakuyDaH03 yd7vIPjDlASJoXbcIDQl5W32mG8DBCXUF+EnDqDNdaZyV7xve0cMfjWnklK0YKjddmZ5KeYPfR uDko4S6hx6WX9rGuXu1Dm9h/dH+f5A4Pr46t4AAAA To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687984524; l=3802; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=Z7jlwfWNBT9lUj5uikuMSfyXKZlfykMWYJqb93QRUjU=; b=Q9rGg7Lhf4vvAUnJ5JxpZ6ePIoqS150jNswvaYQhFXC6Ahuv7pG7/pAt5+m37hrpvjgkiuh9d qc1sm3bLa18AyDZyFvwwgOJPi2swBJyqfTXz6ChV8R0YYgND10NVwq+ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This series attempts to introduce Adreno 700 support (with A730 and A740 found on SM8450 and SM8550 respectively), reusing much of the existing A6xx code. This submission largely lays the groundwork for expansion and more or less gives us feature parity (on the kernel side, that is) with existing A6xx parts. On top of introducing a very messy set of three (!) separate and obfuscated deivce identifiers for each 7xx part, this generation introduces very sophisticated hardware multi-threading and (on some SKUs) hardware ray-tracing (not supported yet). After this series, a long-overdue cleanup of drm/msm/adreno is planned in preparation for adding more features and removing some hardcoding. The last patch is a hack that may or may not be necessary depending on your board's humour.. eh.. :/ Developed atop (and hence depends on) [1] The corresponding devicetree patches are initially available at [2] and will be posted after this series gets merged. To test it, you'll also need firmware that you need to obtain from your board (there's none with a redistributable license, sorry..). Most likely it will be in one of these directories on your stock android installation: * /vendor/firmware * /vendor/firmware_mnt * /system ..but some vendors make it hard and you have to do some grepping ;) Requires [3] to work on the userspace side. You'll almost cerainly want to test it alongside Zink with a lot of debug flags (early impl), like: TU_DEBUG=sysmem,nolrz,flushall,noubwc MESA_LOADER_DRIVER_OVERRIDE=zink kmscube [1] https://lore.kernel.org/linux-arm-msm/20230517-topic-a7xx_prep-v4-0-b16f273a91d4@linaro.org/ [2] https://github.com/SoMainline/linux/commits/topic/a7xx_dt [3] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23217 Signed-off-by: Konrad Dybcio Tested-by: Dmitry Baryshkov # sm8450 Tested-by: Neil Armstrong # on SM8550-QRD --- Konrad Dybcio (14): dt-bindings: display/msm/gmu: Add Adreno 7[34]0 GMU dt-bindings: display/msm/gmu: Allow passing QMP handle dt-bindings: display/msm/gpu: Allow A7xx SKUs drm/msm/a6xx: Add missing regs for A7XX drm/msm/a6xx: Introduce a6xx_llc_read drm/msm/a6xx: Move LLC accessors to the common header drm/msm/a6xx: Bail out early if setting GPU OOB fails drm/msm/a6xx: Add skeleton A7xx support drm/msm/a6xx: Send ACD state to QMP at GMU resume drm/msm/a6xx: Mostly implement A7xx gpu_state drm/msm/a6xx: Add A730 support drm/msm/a6xx: Add A740 support drm/msm/a6xx: Vastly increase HFI timeout [RFC] drm/msm/a6xx: Poll for GBIF unhalt status in hw_init .../devicetree/bindings/display/msm/gmu.yaml | 47 +- .../devicetree/bindings/display/msm/gpu.yaml | 4 +- drivers/gpu/drm/msm/adreno/a6xx.xml.h | 9 + drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 188 ++++-- drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 3 + drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 8 + drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 658 ++++++++++++++++++--- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 15 + drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 52 +- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 61 +- drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 90 ++- drivers/gpu/drm/msm/adreno/adreno_device.c | 26 + drivers/gpu/drm/msm/adreno/adreno_gpu.c | 7 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 24 +- drivers/gpu/drm/msm/msm_ringbuffer.h | 2 + 15 files changed, 1070 insertions(+), 124 deletions(-) --- base-commit: 6f9b660e9cbb30669fcfec83288d527c0844717d change-id: 20230628-topic-a7xx_drmmsm-123f30d76cf7 Best regards,