| Message ID | 20230512122134.24339-1-quic_kbajaj@quicinc.com |
|---|---|
| Headers | show |
| Series | soc: qcom: llcc: Add support for QDU1000/QRU1000 | expand |
On 12/05/2023 14:21, Komal Bajaj wrote: > This patch series does the following - > * Add support for reading secure fuse region in qfprom driver > * Add support for qfprom on QDU1000 and QRU1000 SoCs > * Refactor LLCC driver to support multiple configuration > * Add support for multi channel DDR configuration in LLCC > * Add LLCC support for the Qualcomm QDU1000 and QRU1000 SoCs > > Changes in v3- > - Addressed comments from Krzysztof and Mani. Please be more specific, what exactly changed. Best regards, Krzysztof
On 12/05/2023 14:21, Komal Bajaj wrote: > Add properties to the qfprom node for multi channel DDR. > > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> DTS goes to the end of patchset. Better - to separate patchset with links to bindings. Subject: drop redundant pieces, it's too long without actual need. "properties to" can be skipped. > --- > arch/arm64/boot/dts/qcom/qdu1000.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > index 734438113bba..418644f396bc 100644 > --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi > +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi > @@ -1333,6 +1333,18 @@ > interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; > multi-ch-bit-off = <24 2>; > }; > + > + qfprom: efuse@221c8000 { > + compatible = "qcom,qdu1000-qfprom", "qcom,qfprom"; > + reg = <0 0x221c8000 0 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + multi_chan_ddr: multi_chan_ddr@12b { No underscores in node names. Best regards, Krzysztof
On 12/05/2023 14:21, Komal Bajaj wrote: > This reverts commit 6209038f131fee84ff1536dc59864f54d06740f2. > Reverting change as it was merged before corresponding driver side > changes, resulting in incompatibility with the current implementation. > Committing the revert now. > > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qdu1000.dtsi | 12 ------------ This does not make much sense as separate commit. We do not drop drivers to re-add them with bugs fixed. The same here - if the node is not correct, just fix it instead of first removing and then re-adding. Best regards, Krzysztof
On 12/05/2023 14:21, Komal Bajaj wrote: > Add a DT node for Last level cache (aka. system cache) controller > which provides control over the last level cache present on QDU1000 > and QRU1000 SoCs. > Must be squashed. It's difficult to spot the changes against original code. Best regards, Krzysztof
This patch series does the following - * Add support for reading secure fuse region in qfprom driver * Add support for qfprom on QDU1000 and QRU1000 SoCs * Refactor LLCC driver to support multiple configuration * Add support for multi channel DDR configuration in LLCC * Add LLCC support for the Qualcomm QDU1000 and QRU1000 SoCs Changes in v3- - Addressed comments from Krzysztof and Mani. - Using qfprom to read DDR configuration from feature register. Changes in v2: - Addressing comments from Konrad. Komal Bajaj (10): nvmem: qfprom: Add support for secure reading dt-bindings: nvmem: qfprom: Add compatible for QDU1000/QRU1000 arm64: dts: qcom: qdu1000: Add properties to qfprom for multi channel DDR nvmem: qfprom: Add support for secure reading on QDU1000/QRU1000 soc: qcom: llcc: Refactor llcc driver to support multiple configuration soc: qcom: Add LLCC support for multi channel DDR dt-bindings: arm: msm: Add LLCC compatible for QDU1000/QRU1000 Revert "arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller" arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller soc: qcom: llcc: Add QDU1000 and QRU1000 LLCC support .../devicetree/bindings/cache/qcom,llcc.yaml | 2 + .../bindings/nvmem/qcom,qfprom.yaml | 1 + arch/arm64/boot/dts/qcom/qdu1000.dtsi | 30 +- drivers/nvmem/qfprom.c | 74 ++++- drivers/soc/qcom/llcc-qcom.c | 304 +++++++++++++----- include/linux/soc/qcom/llcc-qcom.h | 2 +- 6 files changed, 301 insertions(+), 112 deletions(-)