Message ID | 20230417082127.11681-1-quic_tdas@quicinc.com |
---|---|
Headers | show |
Series | Add video clock controller driver for SM8450 | expand |
Quoting Taniya Das (2023-04-17 01:21:25) > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml > new file mode 100644 > index 000000000000..7e191ba80a4c > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml > @@ -0,0 +1,84 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Video Clock & Reset Controller on SM8450 > + > +maintainers: > + - Taniya Das <quic_tdas@quicinc.com> > + > +description: | > + Qualcomm video clock control module provides the clocks, resets and power > + domains on SM8450. > + > + See also:: include/dt-bindings/clock/qcom,videocc-sm8450.h > + > +properties: > + compatible: > + const: qcom,sm8450-videocc > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Video AHB clock from GCC > + - description: Board XO source > + > + clock-names: Drop clock-names. It matches how newer qcom clk bindings are being done. > + items: > + - const: bi_tcxo > + - const: iface > +