| Message ID | 20230202135036.2635376-1-vladimir.zapolskiy@linaro.org |
|---|---|
| Headers | show |
| Series | crypto: qcom-qce: Add YAML bindings & support for newer SoCs | expand |
Hi Krzysztof, On 2/2/23 15:53, Krzysztof Kozlowski wrote: > On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >> From: Neil Armstrong <neil.armstrong@linaro.org> >> >> On certain Snapdragon processors, the crypto engine clocks are enabled by >> default by security firmware. > > Then probably we should not require them only on these variants. I don't have the exact list of the affected SoCs, I believe Neil can provide such a list, if you find it crucial. -- Best wishes, Vladimir
On 02/02/2023 15:04, Vladimir Zapolskiy wrote: > Hi Krzysztof, > > On 2/2/23 15:53, Krzysztof Kozlowski wrote: >> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>> From: Neil Armstrong <neil.armstrong@linaro.org> >>> >>> On certain Snapdragon processors, the crypto engine clocks are enabled by >>> default by security firmware. >> >> Then probably we should not require them only on these variants. > > I don't have the exact list of the affected SoCs, I believe Neil can provide > such a list, if you find it crucial. It's the case for SM8350, SM8450 & SM8550. Neil > > -- > Best wishes, > Vladimir
On 2/2/23 16:21, Neil Armstrong wrote: > On 02/02/2023 15:04, Vladimir Zapolskiy wrote: >> Hi Krzysztof, >> >> On 2/2/23 15:53, Krzysztof Kozlowski wrote: >>> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>>> From: Neil Armstrong <neil.armstrong@linaro.org> >>>> >>>> On certain Snapdragon processors, the crypto engine clocks are enabled by >>>> default by security firmware. >>> >>> Then probably we should not require them only on these variants. >> >> I don't have the exact list of the affected SoCs, I believe Neil can provide >> such a list, if you find it crucial. > > It's the case for SM8350, SM8450 & SM8550. > On SM8250 there is no QCE clocks also, so I'll add it to the list, and I hope that now the list is complete. It could be that the relevant platforms are the ones with 'qcom,no-clock-support' property of QCE in the downstream.
On 02/02/2023 17:16, Vladimir Zapolskiy wrote: > On 2/2/23 16:21, Neil Armstrong wrote: >> On 02/02/2023 15:04, Vladimir Zapolskiy wrote: >>> Hi Krzysztof, >>> >>> On 2/2/23 15:53, Krzysztof Kozlowski wrote: >>>> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>>>> From: Neil Armstrong <neil.armstrong@linaro.org> >>>>> >>>>> On certain Snapdragon processors, the crypto engine clocks are enabled by >>>>> default by security firmware. >>>> >>>> Then probably we should not require them only on these variants. >>> >>> I don't have the exact list of the affected SoCs, I believe Neil can provide >>> such a list, if you find it crucial. >> >> It's the case for SM8350, SM8450 & SM8550. >> > > On SM8250 there is no QCE clocks also, so I'll add it to the list, and I hope > that now the list is complete. > > It could be that the relevant platforms are the ones with 'qcom,no-clock-support' > property of QCE in the downstream. > Yes this is what I figured out with the 5.10 device-trees I have checkouted. Neil
On 02/02/2023 23:27, Vladimir Zapolskiy wrote: > Hi Krzysztof, > > On 2/2/23 15:53, Krzysztof Kozlowski wrote: >> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>> From: Neil Armstrong <neil.armstrong@linaro.org> >>> >>> On certain Snapdragon processors, the crypto engine clocks are enabled by >>> default by security firmware. >> >> Then probably we should not require them only on these variants. > > the rationale is clear, but here comes a minor problem, older platforms > require clocks, when newer ones do not. When a generic SoC-specific compatible > is introduced, let say "qcom,ipq4019-qce", it itself requires the clocks, > but then newer platforms can not be based on this particular compatible, > otherwise they will require clocks and this comes as invalid. > > How to resolve it properly, shall there be another generic SoC-specific > compatible without clocks and NOT based on that "qcom,ipq4019-qce" compatible? > > By the way, QCE on SM8150 also shall not need the clocks. Assuming you have: 1. ipq4019 requiring clocks 2. msm8996 compatible with ipq4019, requiring clocks 3. ipq6018 compatible with ipq4019, not requiring clocks allOf: - if: properties: compatible: enum: - ipq4019-qce then: required: - clocks - if: properties: compatible: contains: enum: - msm8996-qce then: required: - clocks That's not pretty. Another solution is to make non-clock-requiring variants as their own family: 1. msm8996-qce, ipq4019-qce 2. sm8550-qce, sm8150-qce and then in the driver you need two entries - ipq4019 and sm8150. I like the latter, because for clock-requiring variants your driver should actually get them and require. For non-clock-requiring variants, you just skip the clocks (do not fail). Therefore you need different driver data for these two families. Best regards, Krzysztof
Hi Krzysztof, On 2/3/23 10:17, Krzysztof Kozlowski wrote: > On 02/02/2023 23:27, Vladimir Zapolskiy wrote: >> Hi Krzysztof, >> >> On 2/2/23 15:53, Krzysztof Kozlowski wrote: >>> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>>> From: Neil Armstrong <neil.armstrong@linaro.org> >>>> >>>> On certain Snapdragon processors, the crypto engine clocks are enabled by >>>> default by security firmware. >>> >>> Then probably we should not require them only on these variants. >> >> the rationale is clear, but here comes a minor problem, older platforms >> require clocks, when newer ones do not. When a generic SoC-specific compatible >> is introduced, let say "qcom,ipq4019-qce", it itself requires the clocks, >> but then newer platforms can not be based on this particular compatible, >> otherwise they will require clocks and this comes as invalid. >> >> How to resolve it properly, shall there be another generic SoC-specific >> compatible without clocks and NOT based on that "qcom,ipq4019-qce" compatible? >> >> By the way, QCE on SM8150 also shall not need the clocks. > > Assuming you have: > 1. ipq4019 requiring clocks > 2. msm8996 compatible with ipq4019, requiring clocks > 3. ipq6018 compatible with ipq4019, not requiring clocks > > allOf: > - if: > properties: > compatible: > enum: > - ipq4019-qce > then: > required: > - clocks > > - if: > properties: > compatible: > contains: > enum: > - msm8996-qce > then: > required: > - clocks > > That's not pretty. > > Another solution is to make non-clock-requiring variants as their own > family: > > 1. msm8996-qce, ipq4019-qce > 2. sm8550-qce, sm8150-qce > > and then in the driver you need two entries - ipq4019 and sm8150. > > I like the latter, because for clock-requiring variants your driver > should actually get them and require. For non-clock-requiring variants, > you just skip the clocks (do not fail). Therefore you need different > driver data for these two families. many thanks for the detailed explanation, the first of two solutions will be even more clumsy and convoluted, since there should be lists split into two baskets. Thus I will go with the second variant and add two family compatibles. -- Best wishes, Vladimir
On 02/02/2023 15:20, Krzysztof Kozlowski wrote: > On 02/02/2023 15:15, Vladimir Zapolskiy wrote: >> Hi Krzysztof, >> >> On 2/2/23 16:01, Krzysztof Kozlowski wrote: >>> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>>> From: Bhupesh Sharma <bhupesh.sharma@linaro.org> >>>> >>>> Since we decided to use soc specific compatibles for describing >>>> the qce crypto IP nodes in the device-trees, adapt the driver >>>> now to handle the same. >>>> >>>> Keep the old deprecated compatible strings still in the driver, >>>> to ensure backward compatibility. >>>> >>>> Cc: Bjorn Andersson <andersson@kernel.org> >>>> Cc: Rob Herring <robh@kernel.org> >>>> Cc: herbert@gondor.apana.org.au >>>> Tested-by: Jordan Crouse <jorcrous@amazon.com> >>>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> >>>> [vladimir: added more SoC specfic compatibles] >>>> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> >>>> --- >>>> drivers/crypto/qce/core.c | 12 ++++++++++++ >>>> 1 file changed, 12 insertions(+) >>>> >>>> diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c >>>> index 8e496fb2d5e2..2420a5ff44d1 100644 >>>> --- a/drivers/crypto/qce/core.c >>>> +++ b/drivers/crypto/qce/core.c >>>> @@ -291,8 +291,20 @@ static int qce_crypto_remove(struct platform_device *pdev) >>>> } >>>> >>>> static const struct of_device_id qce_crypto_of_match[] = { >>>> + /* Following two entries are deprecated (kept only for backward compatibility) */ >>>> { .compatible = "qcom,crypto-v5.1", }, >>>> { .compatible = "qcom,crypto-v5.4", }, >>>> + /* Add compatible strings as per updated dt-bindings, here: */ >>>> + { .compatible = "qcom,ipq4019-qce", }, >>>> + { .compatible = "qcom,ipq6018-qce", }, >>>> + { .compatible = "qcom,ipq8074-qce", }, >>>> + { .compatible = "qcom,msm8996-qce", }, >>>> + { .compatible = "qcom,sdm845-qce", }, >>>> + { .compatible = "qcom,sm8150-qce", }, >>>> + { .compatible = "qcom,sm8250-qce", }, >>>> + { .compatible = "qcom,sm8350-qce", }, >>>> + { .compatible = "qcom,sm8450-qce", }, >>>> + { .compatible = "qcom,sm8550-qce", }, >>> I did not agree with this at v7 and I still do not agree. We already did >>> some effort to clean this pattern in other drivers, so to make it clear >>> - driver does not need 10 compatibles because they are the same. >> >> Here is a misunderstanding, the compatibles are not the same and it shall >> not be assumed this way, only the current support of the IP on different SoCs >> in the driver is the same. It seems the IP version is discoverable, in this case it's perfectly valid to have a generic compatible along a soc specific compatible. It has been done and validated multiple times, like for the ARM Mali Bifrost [1] I'll propose then to add a generic "qcom,crypto" as fallback to all of those new compatibles and clearly document that this is only for crypto IP cores versions that have the runtime version discoverable. We could even add a major version generic fallback compatible like "qcom,crypto-v5" or "qcom,crypto-v5.x" to differentiate from older crypto devices. Neil > > They are the same for the driver. It's the same what we fixed for SDHCI > and other cases. Why this should be treated differently? > >> >> Later on every minor found difference among IPs will require to break DTB ABI, >> if all of the particular SoC specific comaptibles are not listed. > > No, why? Why SDHCI and hundreds of other devices are not affected and > this one is? > > Best regards, > Krzysztof > [1] https://lore.kernel.org/all/20190401080949.14550-1-narmstrong@baylibre.com/
On 02/02/2023 18:16, Vladimir Zapolskiy wrote: > On 2/2/23 16:21, Neil Armstrong wrote: >> On 02/02/2023 15:04, Vladimir Zapolskiy wrote: >>> Hi Krzysztof, >>> >>> On 2/2/23 15:53, Krzysztof Kozlowski wrote: >>>> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>>>> From: Neil Armstrong <neil.armstrong@linaro.org> >>>>> >>>>> On certain Snapdragon processors, the crypto engine clocks are >>>>> enabled by >>>>> default by security firmware. >>>> >>>> Then probably we should not require them only on these variants. >>> >>> I don't have the exact list of the affected SoCs, I believe Neil can >>> provide >>> such a list, if you find it crucial. >> >> It's the case for SM8350, SM8450 & SM8550. >> > > On SM8250 there is no QCE clocks also, so I'll add it to the list, and I > hope > that now the list is complete. > > It could be that the relevant platforms are the ones with > 'qcom,no-clock-support' > property of QCE in the downstream. > Then, sc7180, sc8180x, sdx55, sm6150, sm7150, sm8150 also have this property in QCE device. And, I think, it should also be applicable to sc7280 and sc8280xp.
On 2/7/23 01:45, Dmitry Baryshkov wrote: > On 02/02/2023 18:16, Vladimir Zapolskiy wrote: >> On 2/2/23 16:21, Neil Armstrong wrote: >>> On 02/02/2023 15:04, Vladimir Zapolskiy wrote: >>>> Hi Krzysztof, >>>> >>>> On 2/2/23 15:53, Krzysztof Kozlowski wrote: >>>>> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>>>>> From: Neil Armstrong <neil.armstrong@linaro.org> >>>>>> >>>>>> On certain Snapdragon processors, the crypto engine clocks are >>>>>> enabled by >>>>>> default by security firmware. >>>>> >>>>> Then probably we should not require them only on these variants. >>>> >>>> I don't have the exact list of the affected SoCs, I believe Neil can >>>> provide >>>> such a list, if you find it crucial. >>> >>> It's the case for SM8350, SM8450 & SM8550. >>> >> >> On SM8250 there is no QCE clocks also, so I'll add it to the list, and I >> hope >> that now the list is complete. >> >> It could be that the relevant platforms are the ones with >> 'qcom,no-clock-support' >> property of QCE in the downstream. >> > > Then, sc7180, sc8180x, sdx55, sm6150, sm7150, sm8150 also have this > property in QCE device. And, I think, it should also be applicable to > sc7280 and sc8280xp. So maybe do you have a better candidate among the SoCs for a QCE IP family name than SM8150 based? Likely it could be the first released SoC among mentioned above. -- Best wishes, Vladimir
On 10/02/2023 12:12, Vladimir Zapolskiy wrote: > On 2/7/23 01:45, Dmitry Baryshkov wrote: >> On 02/02/2023 18:16, Vladimir Zapolskiy wrote: >>> On 2/2/23 16:21, Neil Armstrong wrote: >>>> On 02/02/2023 15:04, Vladimir Zapolskiy wrote: >>>>> Hi Krzysztof, >>>>> >>>>> On 2/2/23 15:53, Krzysztof Kozlowski wrote: >>>>>> On 02/02/2023 14:50, Vladimir Zapolskiy wrote: >>>>>>> From: Neil Armstrong <neil.armstrong@linaro.org> >>>>>>> >>>>>>> On certain Snapdragon processors, the crypto engine clocks are >>>>>>> enabled by >>>>>>> default by security firmware. >>>>>> >>>>>> Then probably we should not require them only on these variants. >>>>> >>>>> I don't have the exact list of the affected SoCs, I believe Neil can >>>>> provide >>>>> such a list, if you find it crucial. >>>> >>>> It's the case for SM8350, SM8450 & SM8550. >>>> >>> >>> On SM8250 there is no QCE clocks also, so I'll add it to the list, and I >>> hope >>> that now the list is complete. >>> >>> It could be that the relevant platforms are the ones with >>> 'qcom,no-clock-support' >>> property of QCE in the downstream. >>> >> >> Then, sc7180, sc8180x, sdx55, sm6150, sm7150, sm8150 also have this >> property in QCE device. And, I think, it should also be applicable to >> sc7280 and sc8280xp. > > So maybe do you have a better candidate among the SoCs for a QCE IP family > name than SM8150 based? Likely it could be the first released SoC among > mentioned above. If you have access to the docs, you will see clear mapping of version to the SoCs. Just choose the oldest SoC from the list (or something looking as the oldest - there is no need to be very accurate). Best regards, Krzysztof
The series contains Qualcomm Crypto Engine dts and driver changes, which modify a set of accepted compatible property values, this is needed to provide a unified and fine-grained support of the driver on old and new platforms. In addition due to QCE IP changes on new Qualcomm platforms, it is reflected in updates to valid device tree properties, namely added iommu, interconnects and optional clocks. Changes since v7: ================= - v7 can be found here: https://lore.kernel.org/linux-arm-msm/20220920114051.1116441-1-bhupesh.sharma@linaro.org - Added a change by Neil Armstrong to document clocks and clock-names properties as optional, - At the moment do not add Bhupesh as a new QCE driver maintainer, - Minor updates to device tree binding documentation and qce driver, in particular added more compatibles and fixed lesser issues. Changes since v6: ================= - v6 can be seen here: https://lore.kernel.org/linux-arm-msm/30756e6f-952f-ccf2-b493-e515ba4f0a64@linaro.org/ - As per Krzysztof's suggestion on v6, clubbed the crypto driver and dt-bindings changes together. Now the overall v5 patchset into 3 separate patchsets, one each for the following areas to allow easier review and handling from the maintainer: arm-msm, crypto and dma Changes since v5: ================= - v5 can be seen here: https://lore.kernel.org/lkml/20211110105922.217895-1-bhupesh.sharma@linaro.org/ - As per Bjorn's suggestion on irc, broke down the patchset into 4 separate patchsets, one each for the following areas to allow easier review and handling from the maintainer: arm-msm, crypto, dma and devicetree - Addressed Rob's, Vladimir's and Bjorn's review comments received on v5. - Added Tested-by from Jordan received on the v5. Changes since v4: ================= - v4 for sm8250 can be seen here: https://lore.kernel.org/linux-arm-msm/20211013105541.68045-1-bhupesh.sharma@linaro.org/ - v1 for sm8150 qce enablement can be seen here: https://lore.kernel.org/linux-arm-msm/20211013165823.88123-1-bhupesh.sharma@linaro.org/ - Merged the sm8150 and sm8250 enablement patches in the same patchset, as per suggestions from Bjorn. - Dropped a couple of patches from v4, as these have been picked by Bjorn already via his tree. - Addressed review comments from Vladimir, Thara and Rob. - Collect Reviewed-by from Rob and Thara on some of the patches from the v4 patchset. Changes since v3: ================= - v3 can be seen here: https://lore.kernel.org/linux-arm-msm/20210519143700.27392-1-bhupesh.sharma@linaro.org/ - Dropped a couple of patches from v3, on basis of the review comments: ~ [PATCH 13/17] crypto: qce: core: Make clocks optional ~ [PATCH 15/17] crypto: qce: Convert the device found dev_dbg() to dev_info() - Addressed review comments from Thara, Rob and Stephan Gerhold. - Collect Reviewed-by from Rob and Thara on some of the patches from the v3 patchset. Changes since v2: ================= - v2 can be seen here: https://lore.kernel.org/dmaengine/20210505213731.538612-1-bhupesh.sharma@linaro.org/ - Drop a couple of patches from v1, which tried to address the defered probing of qce driver in case bam dma driver is not yet probed. Replace it instead with a single (simpler) patch [PATCH 16/17]. - Convert bam dma and qce crypto dt-bindings to YAML. - Addressed review comments from Thara, Bjorn, Vinod and Rob. Changes since v1: ================= - v1 can be seen here: https://lore.kernel.org/linux-arm-msm/20210310052503.3618486-1-bhupesh.sharma@linaro.org/ - v1 did not work well as reported earlier by Dmitry, so v2 contains the following changes/fixes: ~ Enable the interconnect path b/w BAM DMA and main memory first before trying to access the BAM DMA registers. ~ Enable the interconnect path b/w qce crytpo and main memory first before trying to access the qce crypto registers. ~ Make sure to document the required and optional properties for both BAM DMA and qce crypto drivers. ~ Add a few debug related print messages in case the qce crypto driver passes or fails to probe. ~ Convert the qce crypto driver probe to a defered one in case the BAM DMA or the interconnect driver(s) (needed on specific Qualcomm parts) are not yet probed. Qualcomm crypto engine (qce) is available on several Snapdragon SoCs. The qce block supports hardware accelerated algorithms for encryption and authentication. It also provides support for aes, des, 3des encryption algorithms and sha1, sha256, hmac(sha1), hmac(sha256) authentication algorithms. Bhupesh Sharma (6): dt-bindings: qcom-qce: Convert bindings to yaml MAINTAINERS: Add qcom-qce dt-binding file to QUALCOMM CRYPTO DRIVERS section dt-bindings: qcom-qce: Add 'interconnects' and 'interconnect-names' dt-bindings: qcom-qce: Add 'iommus' to optional properties dt-bindings: qcom-qce: Add new SoC compatible strings for qcom-qce crypto: qce: core: Add new compatibles for qce crypto driver Neil Armstrong (1): dt-bindings: qcom-qce: document clocks and clock-names as optional Thara Gopinath (2): crypto: qce: core: Add support to initialize interconnect path crypto: qce: core: Make clocks optional .../devicetree/bindings/crypto/qcom-qce.txt | 25 ----- .../devicetree/bindings/crypto/qcom-qce.yaml | 98 +++++++++++++++++++ MAINTAINERS | 1 + drivers/crypto/qce/core.c | 34 ++++++- drivers/crypto/qce/core.h | 1 + 5 files changed, 130 insertions(+), 29 deletions(-) delete mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.txt create mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.yaml