From patchwork Tue Jan 24 14:15:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devi Priya X-Patchwork-Id: 646092 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2376CC54EAA for ; Tue, 24 Jan 2023 14:17:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234849AbjAXORL (ORCPT ); Tue, 24 Jan 2023 09:17:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234822AbjAXORI (ORCPT ); Tue, 24 Jan 2023 09:17:08 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 413FED52F; Tue, 24 Jan 2023 06:17:04 -0800 (PST) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30ODrUoe026106; Tue, 24 Jan 2023 14:16:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=LU5OsjKuwBW6l12Ef/P6s8MXKpt4xlHQeDXksT/qW38=; b=W3uJEPdGffSo+C8W5oH4MPmu92HIpCDRuLS5BKhHN/3OpDXS3hP/gVNdWTvGu/AGslxS QUaaeWHIL2k2P0olZCRVf5jlj8lUqGDqX6Zhy1TBGNko/AlnCHHDbHmydcvjk+Xk71wu 7yxMI4JSfE4XzTI6B02MdngOP77wki5aZel8zm1KkE/CwSDpSYrLWEHOaGCpFGm6K12M GwuWf9tQVEJeSIDaFpDjW6qmtgpNGVxZ9XWcPgaAOLn4W/5iebXodgdtGmrUvNhETaiH RSB1C4N5qpjQAT3k4ogt9VTx5cDUgQmbKe0dZz8r6pOy8F4MzdRMV0tkLAY0ja30esih cw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3n89gt51cq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 24 Jan 2023 14:16:06 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30OEG5lN001102 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 24 Jan 2023 14:16:05 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Tue, 24 Jan 2023 06:15:56 -0800 From: devi priya To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH V1 0/8] Add minimal boot support for IPQ9574 Date: Tue, 24 Jan 2023 19:45:33 +0530 Message-ID: <20230124141541.8290-1-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: rruTB5FWrRxVWp7Wn7edqIj4v3CnEP1W X-Proofpoint-ORIG-GUID: rruTB5FWrRxVWp7Wn7edqIj4v3CnEP1W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-23_12,2023-01-24_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=650 spamscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 adultscore=0 clxscore=1011 mlxscore=0 suspectscore=0 phishscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301240129 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The IPQ9574 is Qualcomm's 802.11ax SoC for Routers, Gateways and Access Points. This series adds minimal board boot support for ipq9574-al02-c7 board [V1] Fixed all the review comments Poovendhan Selvaraj (1): arm64: dts: qcom: Add ipq9574 SoC and AL02 board support devi priya (7): dt-bindings: Add ipq9574 clock and reset definitions clk: qcom: Add Global Clock Controller driver for IPQ9574 dt-bindings: pinctrl: qcom: Document IPQ9574 pinctrl driver pinctrl: qcom: Add IPQ9574 pinctrl driver dt-bindings: arm: qcom: Add ipq9574 compatible dt-bindings: mmc: sdhci-msm: Document the IPQ9574 compatible arm64: defconfig: Enable IPQ9574 SoC base configs .../devicetree/bindings/arm/qcom.yaml | 7 + .../bindings/clock/qcom,gcc-other.yaml | 39 +- .../devicetree/bindings/mmc/sdhci-msm.yaml | 1 + .../bindings/pinctrl/qcom,ipq9574-tlmm.yaml | 135 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dts | 78 + arch/arm64/boot/dts/qcom/ipq9574.dtsi | 285 ++ arch/arm64/configs/defconfig | 2 + drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-ipq9574.c | 4301 +++++++++++++++++ drivers/pinctrl/qcom/Kconfig | 11 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-ipq9574.c | 1007 ++++ include/dt-bindings/clock/qcom,ipq9574-gcc.h | 213 + include/dt-bindings/reset/qcom,ipq9574-gcc.h | 164 + 16 files changed, 6251 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml create mode 100644 arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dts create mode 100644 arch/arm64/boot/dts/qcom/ipq9574.dtsi create mode 100644 drivers/clk/qcom/gcc-ipq9574.c create mode 100644 drivers/pinctrl/qcom/pinctrl-ipq9574.c create mode 100644 include/dt-bindings/clock/qcom,ipq9574-gcc.h create mode 100644 include/dt-bindings/reset/qcom,ipq9574-gcc.h base-commit: 7bf70dbb18820b37406fdfa2aaf14c2f5c71a11a