| Message ID | 20230115114146.12628-1-quic_kriskura@quicinc.com |
|---|---|
| Headers | show |
| Series | Add multiport support for DWC3 controllers | expand |
On Sun, Jan 15, 2023 at 05:11:41PM +0530, Krishna Kurapati wrote: > Currently the DWC3 driver supports only single port controller which > requires at most two PHYs ie HS and SS PHYs. There are SoCs that has > DWC3 controller with multiple ports that can operate in host mode. > Some of the port supports both SS+HS and other port supports only HS > mode. > > This change primarily refactors the Phy logic in core driver to allow > multiport support with Generic Phy's. > > Chananges have been tested on QCOM SoC SA8295P which has 4 ports (2 > are HS+SS capable and 2 are HS only capable). > I can confirm that applying this series allow me to use all 6 USB ports on the ADP. Looking forward to v5. Thanks, Bjorn > Changes in v4: > Added DT support for SA8295p. > > Changes in v3: > Incase any PHY init fails, then clear/exit the PHYs that > are already initialized. > > Changes in v2: > Changed dwc3_count_phys to return the number of PHY Phandles in the node. > This will be used now in dwc3_extract_num_phys to increment num_usb2_phy > and num_usb3_phy. > > Added new parameter "ss_idx" in dwc3_core_get_phy_ny_node and changed its > structure such that the first half is for HS-PHY and second half is for > SS-PHY. > > In dwc3_core_get_phy, for multiport controller, only if SS-PHY phandle is > present, pass proper SS_IDX else pass -1. > > Link to v3: https://lore.kernel.org/all/1654709787-23686-1-git-send-email-quic_harshq@quicinc.com/#r > Link to v2: https://lore.kernel.org/all/1653560029-6937-1-git-send-email-quic_harshq@quicinc.com/#r > > Krishna Kurapati (5): > dt-bindings: usb: Add bindings to support multiport properties > usb: dwc3: core: Refactor PHY logic to support Multiport Controller > usb: dwc3: core: Do not setup event buffers for host only controllers > usb: dwc3: qcom: Add multiport controller support for qcom wrapper > arm: dts: msm: Add multiport controller node for usb > > .../devicetree/bindings/usb/snps,dwc3.yaml | 42 ++- > arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 49 +++ > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 60 ++++ > drivers/usb/dwc3/core.c | 325 +++++++++++++----- > drivers/usb/dwc3/core.h | 15 +- > drivers/usb/dwc3/drd.c | 14 +- > drivers/usb/dwc3/dwc3-qcom.c | 28 +- > 7 files changed, 429 insertions(+), 104 deletions(-) > > -- > 2.39.0 >
On 1/19/2023 9:13 AM, Bjorn Andersson wrote: > On Sun, Jan 15, 2023 at 05:11:41PM +0530, Krishna Kurapati wrote: >> Currently the DWC3 driver supports only single port controller which >> requires at most two PHYs ie HS and SS PHYs. There are SoCs that has >> DWC3 controller with multiple ports that can operate in host mode. >> Some of the port supports both SS+HS and other port supports only HS >> mode. >> >> This change primarily refactors the Phy logic in core driver to allow >> multiport support with Generic Phy's. >> >> Chananges have been tested on QCOM SoC SA8295P which has 4 ports (2 >> are HS+SS capable and 2 are HS only capable). >> > > I can confirm that applying this series allow me to use all 6 USB ports > on the ADP. Looking forward to v5. > > Thanks, > Bjorn > Thanks Bjorn for testing it out. Regards, Krishna, >> Changes in v4: >> Added DT support for SA8295p. >> >> Changes in v3: >> Incase any PHY init fails, then clear/exit the PHYs that >> are already initialized. >> >> Changes in v2: >> Changed dwc3_count_phys to return the number of PHY Phandles in the node. >> This will be used now in dwc3_extract_num_phys to increment num_usb2_phy >> and num_usb3_phy. >> >> Added new parameter "ss_idx" in dwc3_core_get_phy_ny_node and changed its >> structure such that the first half is for HS-PHY and second half is for >> SS-PHY. >> >> In dwc3_core_get_phy, for multiport controller, only if SS-PHY phandle is >> present, pass proper SS_IDX else pass -1. >> >> Link to v3: https://lore.kernel.org/all/1654709787-23686-1-git-send-email-quic_harshq@quicinc.com/#r >> Link to v2: https://lore.kernel.org/all/1653560029-6937-1-git-send-email-quic_harshq@quicinc.com/#r >> >> Krishna Kurapati (5): >> dt-bindings: usb: Add bindings to support multiport properties >> usb: dwc3: core: Refactor PHY logic to support Multiport Controller >> usb: dwc3: core: Do not setup event buffers for host only controllers >> usb: dwc3: qcom: Add multiport controller support for qcom wrapper >> arm: dts: msm: Add multiport controller node for usb >> >> .../devicetree/bindings/usb/snps,dwc3.yaml | 42 ++- >> arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 49 +++ >> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 60 ++++ >> drivers/usb/dwc3/core.c | 325 +++++++++++++----- >> drivers/usb/dwc3/core.h | 15 +- >> drivers/usb/dwc3/drd.c | 14 +- >> drivers/usb/dwc3/dwc3-qcom.c | 28 +- >> 7 files changed, 429 insertions(+), 104 deletions(-) >> >> -- >> 2.39.0 >>