mbox series

[00/11] Updates to sc8280xp-pmic

Message ID 20221027063006.9056-1-manivannan.sadhasivam@linaro.org
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Series Updates to sc8280xp-pmic | expand

Message

Manivannan Sadhasivam Oct. 27, 2022, 6:29 a.m. UTC
Hello,

This series adds below updates to sc8280xp-pmics:

PM8280_{1/2}:
- Temp alarm
- Thermal zones
- VADC channels
- ADC_TM5 channels

PMK8280:
- ADC7 block
- VADC channels
- TM5 block

PMR735A:
- VADC channels

The sc8280xp-pmics is based on the new PMIC7 architecture. In this, all the
ADC/TM5 measurements are collected by the primary PMIC PMK8280 from other
slave PMICs PM8280_{1/2}, PMR735A using the Programmable Boot Sequence (PBS)
and exposed them over the individual channels.

PMK8280 uses the Slave ID (SID) for identifying each slave PMICs in a system.
This ID is not static for each PMIC but rather set for each platform by the
hardware designers. So this series allows the configurable SID by modifying the
binding to accept SID values instead of hardcoding them.

This series is tested on Lenovo X13s laptop by monitoring the temperature of
the 8 on-board thermistors through IIO interface.

Thanks,
Mani

Manivannan Sadhasivam (11):
  dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels
  arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2}
    PMICs
  arm64: dts: qcom: sc8280xp-pmics: Add thermal zones for PM8280_{1/2}
    PMICs
  arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN input
  arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 block
  arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280
  arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN input
  arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels
  arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels
  arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel
  arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels

 .../bindings/thermal/qcom-spmi-adc-tm5.yaml   |   6 +-
 .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts    | 158 ++++++++++++++++++
 arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi  |  85 ++++++++++
 .../dt-bindings/iio/qcom,spmi-adc7-pm8350.h   |  90 +++++-----
 4 files changed, 289 insertions(+), 50 deletions(-)

Comments

Krzysztof Kozlowski Oct. 27, 2022, 1:46 p.m. UTC | #1
On 27/10/2022 02:29, Manivannan Sadhasivam wrote:
> As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
> has the static Slave ID (SID) assigned by default. The primary PMIC
> PMK8350 is responsible for collecting the temperature/voltage data from
> the slave PMICs and exposing them via it's registers.
> 
> For getting the measurements from the slave PMICs, PMK8350 uses the
> channel ID encoded with the SID of the relevant PMIC. So far, the
> dt-binding for the slave PMIC PM8350 assumed that there will be only
> one PM8350 in a system. So it harcoded SID 1 with channel IDs.
> 
> But this got changed in platforms such as Lenovo X13s where there are a
> couple of PM8350 PMICs available. So to address multiple PM8350s, change
> the binding to accept the SID specified by the user and use it for
> encoding the channel ID.
> 
> It should be noted that, even though the SID is static it is not
> globally unique. Only the primary PMIC has the unique SID id 0.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  .../bindings/thermal/qcom-spmi-adc-tm5.yaml   |  6 +-
>  .../dt-bindings/iio/qcom,spmi-adc7-pm8350.h   | 90 +++++++++----------
>  2 files changed, 46 insertions(+), 50 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
> index feb390d50696..d20569b9b763 100644
> --- a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
> +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
> @@ -222,8 +222,8 @@ examples:
>                  qcom,hw-settle-time = <200>;
>              };
>  
> -            conn-therm@47 {
> -                reg = <PM8350_ADC7_AMUX_THM4_100K_PU>;
> +            conn-therm@147 {
> +                reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
>                  qcom,ratiometric;
>                  qcom,hw-settle-time = <200>;
>              };
> @@ -247,7 +247,7 @@ examples:
>  
>              conn-therm@1 {
>                  reg = <1>;
> -                io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU>;
> +                io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>;
>                  qcom,avg-samples = <2>;
>                  qcom,ratiometric;
>                  qcom,hw-settle-time-us = <200>;
> diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
> index 9426f27a1946..50de5adfe6ac 100644
> --- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
> +++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
> @@ -6,62 +6,58 @@
>  #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
>  #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
>  
> -#ifndef PM8350_SID
> -#define PM8350_SID					1
> -#endif
> -
>  /* ADC channels for PM8350_ADC for PMIC7 */
> -#define PM8350_ADC7_REF_GND			(PM8350_SID << 8 | 0x0)
> -#define PM8350_ADC7_1P25VREF			(PM8350_SID << 8 | 0x01)
> -#define PM8350_ADC7_VREF_VADC			(PM8350_SID << 8 | 0x02)
> -#define PM8350_ADC7_DIE_TEMP			(PM8350_SID << 8 | 0x03)
> -
> -#define PM8350_ADC7_AMUX_THM1			(PM8350_SID << 8 | 0x04)
> -#define PM8350_ADC7_AMUX_THM2			(PM8350_SID << 8 | 0x05)
> -#define PM8350_ADC7_AMUX_THM3			(PM8350_SID << 8 | 0x06)
> -#define PM8350_ADC7_AMUX_THM4			(PM8350_SID << 8 | 0x07)
> -#define PM8350_ADC7_AMUX_THM5			(PM8350_SID << 8 | 0x08)
> -#define PM8350_ADC7_GPIO1			(PM8350_SID << 8 | 0x0a)
> -#define PM8350_ADC7_GPIO2			(PM8350_SID << 8 | 0x0b)
> -#define PM8350_ADC7_GPIO3			(PM8350_SID << 8 | 0x0c)
> -#define PM8350_ADC7_GPIO4			(PM8350_SID << 8 | 0x0d)
> +#define PM8350_ADC7_REF_GND(sid)			(sid << 8 | 0x0)

As it is macro, I think it argument should be in parens: (sid)


Best regards,
Krzysztof
Krzysztof Kozlowski Oct. 27, 2022, 1:50 p.m. UTC | #2
On 27/10/2022 02:29, Manivannan Sadhasivam wrote:
> Add thermal zones for the PM8280_{1/2} PMICs by using the temperature
> alarm blocks as the thermal sensors. Temperature trip points are
> inheried from PM8350 PMIC.

inherited

> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---

With above:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
Krzysztof Kozlowski Oct. 27, 2022, 1:54 p.m. UTC | #3
On 27/10/2022 02:30, Manivannan Sadhasivam wrote:
> Add support for ADC7 block available in PMK8280 for reading the
> temperature via the AMUX pins.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
> index 4a3464f5e6e9..32086d5edd0d 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-pmics.dtsi
> @@ -75,6 +75,17 @@ pmk8280_pon_resin: resin {
>  				status = "disabled";
>  			};
>  		};
> +
> +		pmk8280_vadc: adc@3100 {
> +			compatible = "qcom,spmi-adc7";
> +			reg = <0x3100>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +			interrupt-names = "eoc-int-en-set";

Schema does not accept this. Be sure `make dtbs_check` passes.

Best regards,
Krzysztof