mbox series

[v2,0/2] Convert Qcom CPUFREQ HW binding to YAML

Message ID 20220309151541.139511-1-manivannan.sadhasivam@linaro.org
Headers show
Series Convert Qcom CPUFREQ HW binding to YAML | expand

Message

Manivannan Sadhasivam March 9, 2022, 3:15 p.m. UTC
Hi,

Patch 2/2 was submitted separately [1] but Rob's bot reported errors related to
the performance domain binding that used Qcom CPUFREQ as an example. But Qcom
CPUFREQ driver doesn't support the generic performance domains yet.

So I've added a patch 1/2 that fixes the warning by using MediaTek CPUFREQ as
the example and added both patches to this series.

Thanks,
Mani

[1] https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20211005044920.78544-1-manivannan.sadhasivam@linaro.org/

Changes in v2:

* Moved dvfs binding patch to 1/2 for avoiding DT Bot error.
* Added Krzysztof to "To" list.

Manivannan Sadhasivam (2):
  dt-bindings: dvfs: Use MediaTek CPUFREQ HW as an example
  dt-bindings: cpufreq: cpufreq-qcom-hw: Convert to YAML bindings

 .../bindings/cpufreq/cpufreq-qcom-hw.txt      | 172 ---------------
 .../bindings/cpufreq/cpufreq-qcom-hw.yaml     | 201 ++++++++++++++++++
 .../bindings/dvfs/performance-domain.yaml     |  14 +-
 3 files changed, 211 insertions(+), 176 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt
 create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml

Comments

Sudeep Holla March 9, 2022, 7:17 p.m. UTC | #1
On Wed, Mar 09, 2022 at 08:45:40PM +0530, Manivannan Sadhasivam wrote:
> Qcom CPUFREQ HW don't have the support for generic performance domains yet.
> So use MediaTek CPUFREQ HW that has the support available in mainline.
> 
> This also silences the below dtschema warnings for "cpufreq-qcom-hw.yaml":
> 
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: reg: [[305397760, 4096]] is too short
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clocks' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clock-names' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#freq-domain-cells' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#performance-domain-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> 
> Cc: Hector Yuan <hector.yuan@mediatek.com>
> Cc: Sudeep Holla <sudeep.holla@arm.com>

Thanks for fixing this. It seem to have slipped through the cracks. I had
plans to push this once Mediatek driver was merged but totally forgot about
it.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Rob Herring (Arm) March 10, 2022, 11:13 p.m. UTC | #2
On Wed, 09 Mar 2022 20:45:40 +0530, Manivannan Sadhasivam wrote:
> Qcom CPUFREQ HW don't have the support for generic performance domains yet.
> So use MediaTek CPUFREQ HW that has the support available in mainline.
> 
> This also silences the below dtschema warnings for "cpufreq-qcom-hw.yaml":
> 
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: reg: [[305397760, 4096]] is too short
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clocks' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clock-names' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#freq-domain-cells' is a required property
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#performance-domain-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
>         From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
> 
> Cc: Hector Yuan <hector.yuan@mediatek.com>
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  .../bindings/dvfs/performance-domain.yaml          | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>
Viresh Kumar March 11, 2022, 3:31 a.m. UTC | #3
On 09-03-22, 20:45, Manivannan Sadhasivam wrote:
> Hi,
> 
> Patch 2/2 was submitted separately [1] but Rob's bot reported errors related to
> the performance domain binding that used Qcom CPUFREQ as an example. But Qcom
> CPUFREQ driver doesn't support the generic performance domains yet.
> 
> So I've added a patch 1/2 that fixes the warning by using MediaTek CPUFREQ as
> the example and added both patches to this series.
> 
> Thanks,
> Mani
> 
> [1] https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20211005044920.78544-1-manivannan.sadhasivam@linaro.org/
> 
> Changes in v2:
> 
> * Moved dvfs binding patch to 1/2 for avoiding DT Bot error.
> * Added Krzysztof to "To" list.

Applied. Thanks.