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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id g17sm9394624pgh.61.2021.07.03.19.40.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Jul 2021 19:40:43 -0700 (PDT) From: Shawn Guo To: Stephen Boyd Cc: Bjorn Andersson , Rob Herring , Sivaprakash Murugesan , Benjamin Li , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Shawn Guo Subject: [PATCH v2 0/4] Add MSM8939 APCS/A53PLL clock support Date: Sun, 4 Jul 2021 10:40:28 +0800 Message-Id: <20210704024032.11559-1-shawn.guo@linaro.org> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This series adds MSM8939 APCS/A53PLL clock support. Most outstanding thing about MSM8939 is that it integrates 3 APCS instances, for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache Coherent Interconnect) respectively. Changes for v2: - Reword the commit log of first patch as suggested by Stephen. - Drop 'clock-output-names' bindings and use @unit-address to get unique a53pll/mux clock names. - Use 'operating-points-v2' bindings to pass frequency table via OPP, so that we can use one single compatible for all 3 MSM8939 a53pll. Shawn Guo (4): clk: qcom: apcs-msm8916: Flag a53mux instead of a53pll as critical clk: qcom: a53pll/mux: Use unique clock name dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support clk: qcom: a53-pll: Add MSM8939 a53pll support .../bindings/clock/qcom,a53pll.yaml | 3 + drivers/clk/qcom/a53-pll.c | 68 ++++++++++++++++++- drivers/clk/qcom/apcs-msm8916.c | 10 ++- 3 files changed, 76 insertions(+), 5 deletions(-) -- 2.17.1 Acked-by: Rob Herring