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[0/6] arm64: dts: qcom: smmu/USB nodes and HDK855/HDK865 dts

Message ID 20200524023815.21789-1-jonathan@marek.ca
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Series arm64: dts: qcom: smmu/USB nodes and HDK855/HDK865 dts | expand

Message

Jonathan Marek May 24, 2020, 2:38 a.m. UTC
Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.

Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
few changes. Notably, the HDK865 dts has regulator config changed a bit based
on downstream (I think sm8250-mtp.dts is wrong and copied too much from sm8150).

Jonathan Marek (6):
  arm64: dts: qcom: sm8150: add apps_smmu node
  arm64: dts: qcom: sm8250: add apps_smmu node
  arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes
  arm64: dts: qcom: sm8250: Add USB and PHY device nodes
  arm64: dts: qcom: add sm8150 hdk dts
  arm64: dts: qcom: add sm8250 hdk dts

 arch/arm64/boot/dts/qcom/Makefile       |   2 +
 arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 461 ++++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sm8150.dtsi    | 180 +++++++++
 arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 454 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sm8250.dtsi    | 287 +++++++++++++++
 5 files changed, 1384 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm8150-hdk.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sm8250-hdk.dts

Comments

Sai Prakash Ranjan May 25, 2020, 9:42 a.m. UTC | #1
Hi Jonathan,

On 2020-05-24 08:08, Jonathan Marek wrote:
> Add the apps_smmu node for sm8250. Note that adding the iommus field 
> for
> UFS is required because initializing the iommu removes the bypass 
> mapping
> that created by the bootloader.
> 

This statement doesn't seem right, you can just say since the bypass is 
disabled
by default now, we need to add this property to enable translation and 
avoid global faults.

> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 107 +++++++++++++++++++++++++++
>  1 file changed, 107 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 2f99c350c287..43c5e48c15e2 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -323,6 +323,8 @@ ufs_mem_hc: ufshc@1d84000 {
> 
>  			power-domains = <&gcc UFS_PHY_GDSC>;
> 
> +			iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>;
> +
>  			clock-names =
>  				"core_clk",
>  				"bus_aggr_clk",
> @@ -428,6 +430,111 @@ tlmm: pinctrl@f100000 {
>  			wakeup-parent = <&pdc>;
>  		};
> 
> +		apps_smmu: iommu@15000000 {
> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";

This should be qcom,sm8250-smmu-500 and also you need to update the 
arm-smmu
binding with this compatible in a separate patch.

-Sai
Jonathan Marek May 25, 2020, 10:09 a.m. UTC | #2
Hi,

On 5/25/20 5:42 AM, Sai Prakash Ranjan wrote:
> Hi Jonathan,
> 
> On 2020-05-24 08:08, Jonathan Marek wrote:
>> Add the apps_smmu node for sm8250. Note that adding the iommus field for
>> UFS is required because initializing the iommu removes the bypass mapping
>> that created by the bootloader.
>>
> 
> This statement doesn't seem right, you can just say since the bypass is 
> disabled
> by default now, we need to add this property to enable translation and 
> avoid global faults.
> 

If I use this patch [1] then the UFS iommu property isn't needed. In 
downstream, the identity (bypass?) stream mapping is inherited from the 
bootloader, and UFS is used without any iommu property. Setting 
ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n doesn't make it work on its own 
(without the UFS iommu property), so there's more to it than just 
"bypass is disabled by default now".

https://patchwork.kernel.org/patch/11310757/

>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>> ---
>>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 107 +++++++++++++++++++++++++++
>>  1 file changed, 107 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> index 2f99c350c287..43c5e48c15e2 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
>> @@ -323,6 +323,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>
>>              power-domains = <&gcc UFS_PHY_GDSC>;
>>
>> +            iommus = <&apps_smmu 0x0e0 0>, <&apps_smmu 0x4e0 0>;
>> +
>>              clock-names =
>>                  "core_clk",
>>                  "bus_aggr_clk",
>> @@ -428,6 +430,111 @@ tlmm: pinctrl@f100000 {
>>              wakeup-parent = <&pdc>;
>>          };
>>
>> +        apps_smmu: iommu@15000000 {
>> +            compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> 
> This should be qcom,sm8250-smmu-500 and also you need to update the 
> arm-smmu
> binding with this compatible in a separate patch.
> 
> -Sai
>
Sai Prakash Ranjan May 25, 2020, 11:17 a.m. UTC | #3
Hi,

On 2020-05-25 16:38, Jonathan Marek wrote:
> On 5/25/20 6:54 AM, Sai Prakash Ranjan wrote:
>> On 2020-05-25 15:39, Jonathan Marek wrote:
>>> Hi,
>>> 
>>> On 5/25/20 5:42 AM, Sai Prakash Ranjan wrote:
>>>> Hi Jonathan,
>>>> 
>>>> On 2020-05-24 08:08, Jonathan Marek wrote:
>>>>> Add the apps_smmu node for sm8250. Note that adding the iommus 
>>>>> field for
>>>>> UFS is required because initializing the iommu removes the bypass 
>>>>> mapping
>>>>> that created by the bootloader.
>>>>> 
>>>> 
>>>> This statement doesn't seem right, you can just say since the bypass 
>>>> is disabled
>>>> by default now, we need to add this property to enable translation 
>>>> and avoid global faults.
>>>> 
>>> 
>>> If I use this patch [1] then the UFS iommu property isn't needed. In
>>> downstream, the identity (bypass?) stream mapping is inherited from
>>> the bootloader, and UFS is used without any iommu property. Setting
>>> ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n doesn't make it work on its own
>>> (without the UFS iommu property), so there's more to it than just
>>> "bypass is disabled by default now".
>>> 
>>> https://patchwork.kernel.org/patch/11310757/
>>> 
>> 
>> "iommus" property is not about inheriting stream mapping from 
>> bootloader,
>> it is used to enable SMMU address translation for the corresponding
>> master when specified. So when you have disabled bypass, i.e.,
>> ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y or via cmdline 
>> "arm-smmu.disable_bypass=1"
>> and iommus property with SID and mask is not specified, then it will 
>> result
>> in SMMU global faults.
>> 
>> Downstream has bypass enabled(ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n),so 
>> you
>> won't see any global faults if you do not have iommus property.
>> 
>> Patch in your link is for display because of the usecase for splash 
>> screen
>> on android and some other devices where the bootloader will configure 
>> SMMU,
>> it has not yet merged and not likely to get merged in the current 
>> state.
>> 
>> So yes "there is *not* much more to it than bypass is disabled by 
>> default now"
>> and you have to specify "iommus" for the master devices or you should 
>> enable bypass,
>> i.e., ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n or 
>> arm-smmu.disable_bypass=n
>> 
>> Try without the patch in the link and without iommus for UFS and
>> ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y and you will see.
>> 
>> -Sai
> 
> I know that the "iommus" property is not about inheriting stream
> mapping. Probing the iommu removes the stream mapping created by the
> bootloader, the iommus property is added so that new mappings are
> created to replace what was removed.
> 
> You seem to be under the impression that the SM8150/SM8250 bootloader
> does not configure SMMU. It does, for both UFS and SDHC, just like it
> does for display/splash screen on some devices.
> 

It could be that bootloader does configure SMMU for UFS and SDHC, but 
the
upstream SMMU driver doesnt allow to inherit stream mapping from the 
bootloader
yet, so adding iommus property based on the assumption that it is 
inherited seems
wrong.

> With either value of ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT, it will not
> work without the iommus property.

I'm pretty sure that if you have ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n 
and
without iommus, it should work.

-Sai
Sai Prakash Ranjan May 25, 2020, 11:40 a.m. UTC | #4
On 2020-05-25 16:57, Jonathan Marek wrote:
> On 5/25/20 7:17 AM, Sai Prakash Ranjan wrote:
>> Hi,
>> 
>> On 2020-05-25 16:38, Jonathan Marek wrote:
>>> On 5/25/20 6:54 AM, Sai Prakash Ranjan wrote:
>>>> On 2020-05-25 15:39, Jonathan Marek wrote:
>>>>> Hi,
>>>>> 
>>>>> On 5/25/20 5:42 AM, Sai Prakash Ranjan wrote:
>>>>>> Hi Jonathan,
>>>>>> 
>>>>>> On 2020-05-24 08:08, Jonathan Marek wrote:
>>>>>>> Add the apps_smmu node for sm8250. Note that adding the iommus 
>>>>>>> field for
>>>>>>> UFS is required because initializing the iommu removes the bypass 
>>>>>>> mapping
>>>>>>> that created by the bootloader.
>>>>>>> 
>>>>>> 
>>>>>> This statement doesn't seem right, you can just say since the 
>>>>>> bypass is disabled
>>>>>> by default now, we need to add this property to enable translation 
>>>>>> and avoid global faults.
>>>>>> 
>>>>> 
>>>>> If I use this patch [1] then the UFS iommu property isn't needed. 
>>>>> In
>>>>> downstream, the identity (bypass?) stream mapping is inherited from
>>>>> the bootloader, and UFS is used without any iommu property. Setting
>>>>> ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n doesn't make it work on its 
>>>>> own
>>>>> (without the UFS iommu property), so there's more to it than just
>>>>> "bypass is disabled by default now".
>>>>> 
>>>>> https://patchwork.kernel.org/patch/11310757/
>>>>> 
>>>> 
>>>> "iommus" property is not about inheriting stream mapping from 
>>>> bootloader,
>>>> it is used to enable SMMU address translation for the corresponding
>>>> master when specified. So when you have disabled bypass, i.e.,
>>>> ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y or via cmdline 
>>>> "arm-smmu.disable_bypass=1"
>>>> and iommus property with SID and mask is not specified, then it will 
>>>> result
>>>> in SMMU global faults.
>>>> 
>>>> Downstream has bypass 
>>>> enabled(ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n),so you
>>>> won't see any global faults if you do not have iommus property.
>>>> 
>>>> Patch in your link is for display because of the usecase for splash 
>>>> screen
>>>> on android and some other devices where the bootloader will 
>>>> configure SMMU,
>>>> it has not yet merged and not likely to get merged in the current 
>>>> state.
>>>> 
>>>> So yes "there is *not* much more to it than bypass is disabled by 
>>>> default now"
>>>> and you have to specify "iommus" for the master devices or you 
>>>> should enable bypass,
>>>> i.e., ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n or 
>>>> arm-smmu.disable_bypass=n
>>>> 
>>>> Try without the patch in the link and without iommus for UFS and
>>>> ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y and you will see.
>>>> 
>>>> -Sai
>>> 
>>> I know that the "iommus" property is not about inheriting stream
>>> mapping. Probing the iommu removes the stream mapping created by the
>>> bootloader, the iommus property is added so that new mappings are
>>> created to replace what was removed.
>>> 
>>> You seem to be under the impression that the SM8150/SM8250 bootloader
>>> does not configure SMMU. It does, for both UFS and SDHC, just like it
>>> does for display/splash screen on some devices.
>>> 
>> 
>> It could be that bootloader does configure SMMU for UFS and SDHC, but 
>> the
>> upstream SMMU driver doesnt allow to inherit stream mapping from the 
>> bootloader
>> yet, so adding iommus property based on the assumption that it is 
>> inherited seems
>> wrong.
>> 
> 
> I never said adding the iommus property is for inheriting stream
> mapping. I mentioned inheriting to say UFS works without the iommus
> property on downstream (it inherits a identity/bypass mapping).
> 

Your commit description says "adding the iommus field for UFS is 
required
because initializing the iommu removes the bypass mapping that created 
by the
bootloader". So here it would mean like iommus property for UFS is not 
for
enabling address translation by SMMU for UFS but to avoid removing 
mappings
created by the bootloader which is not exactly what iommus property is 
for.

>>> With either value of ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT, it will not
>>> work without the iommus property.
>> 
>> I'm pretty sure that if you have ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n 
>> and
>> without iommus, it should work.
>> 
> 
> It doesn't work, with either ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=n or
> ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y.
> 

Ok since you are very sure about this, I will try with your patches on
SM8150 MTP tomorrow since I do not have access to one now.
Also just to make sure, please remove all the extra SMMU patches you 
have
in your tree which are not yet merged or from downstream kernel.

-Sai
Bjorn Andersson May 29, 2020, 2:52 a.m. UTC | #5
On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:

> Add the apps_smmu node for sm8150. Note that adding the iommus field for
> UFS is required because initializing the iommu removes the bypass mapping
> that created by the bootloader.
> 

Unrelated to the patch itself; how do you disable the splash screen on
8150? "fastboot oem select-display-panel none" doesn't seem to work for
me on the MTP - and hence this would prevent my device from booting.

Thanks,
Bjorn

> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>  1 file changed, 91 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index a36512d1f6a1..acb839427b12 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>  			resets = <&gcc GCC_UFS_PHY_BCR>;
>  			reset-names = "rst";
>  
> +			iommus = <&apps_smmu 0x300 0>;
> +
>  			clock-names =
>  				"core_clk",
>  				"bus_aggr_clk",
> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>  				compatible = "snps,dwc3";
>  				reg = <0 0x0a600000 0 0xcd00>;
>  				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +				iommus = <&apps_smmu 0x140 0>;
>  				snps,dis_u2_susphy_quirk;
>  				snps,dis_enblslpm_quirk;
>  				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>  			cell-index = <0>;
>  		};
>  
> +		apps_smmu: iommu@15000000 {
> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> +			reg = <0 0x15000000 0 0x100000>;
> +			#iommu-cells = <2>;
> +			#global-interrupts = <1>;
> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
> +		};
> +
>  		remoteproc_adsp: remoteproc@17300000 {
>  			compatible = "qcom,sm8150-adsp-pas";
>  			reg = <0x0 0x17300000 0x0 0x4040>;
> -- 
> 2.26.1
>
Jonathan Marek May 29, 2020, 3:02 a.m. UTC | #6
On 5/28/20 10:52 PM, Bjorn Andersson wrote:
> On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> 
>> Add the apps_smmu node for sm8150. Note that adding the iommus field for
>> UFS is required because initializing the iommu removes the bypass mapping
>> that created by the bootloader.
>>
> 
> Unrelated to the patch itself; how do you disable the splash screen on
> 8150? "fastboot oem select-display-panel none" doesn't seem to work for
> me on the MTP - and hence this would prevent my device from booting.
> 
> Thanks,
> Bjorn
> 

I don't have a MTP, but on HDK855, "fastboot oem select-display-panel 
none" combined with setting the physical switch to HDMI mode (which 
switches off the 1440x2560 panel) gets it to not setup the display at 
all (just the fastboot command isn't enough).

With HDK865 though that doesn't work and I have a hack to work around it 
(writing 0 to INTF_TIMING_ENGINE_EN early on in boot will stop video 
mode scanout and it won't crash).

>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>>   1 file changed, 91 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> index a36512d1f6a1..acb839427b12 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>   			resets = <&gcc GCC_UFS_PHY_BCR>;
>>   			reset-names = "rst";
>>   
>> +			iommus = <&apps_smmu 0x300 0>;
>> +
>>   			clock-names =
>>   				"core_clk",
>>   				"bus_aggr_clk",
>> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>>   				compatible = "snps,dwc3";
>>   				reg = <0 0x0a600000 0 0xcd00>;
>>   				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> +				iommus = <&apps_smmu 0x140 0>;
>>   				snps,dis_u2_susphy_quirk;
>>   				snps,dis_enblslpm_quirk;
>>   				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>>   			cell-index = <0>;
>>   		};
>>   
>> +		apps_smmu: iommu@15000000 {
>> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
>> +			reg = <0 0x15000000 0 0x100000>;
>> +			#iommu-cells = <2>;
>> +			#global-interrupts = <1>;
>> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
>> +		};
>> +
>>   		remoteproc_adsp: remoteproc@17300000 {
>>   			compatible = "qcom,sm8150-adsp-pas";
>>   			reg = <0x0 0x17300000 0x0 0x4040>;
>> -- 
>> 2.26.1
>>
Bjorn Andersson May 29, 2020, 3:03 a.m. UTC | #7
On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:

> Add initial HDK865 dts, based on sm8250-mtp, with a few changes.
> Notably, regulator configs are changed a bit.
> 
> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  arch/arm64/boot/dts/qcom/Makefile       |   1 +
>  arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 454 ++++++++++++++++++++++++
>  2 files changed, 455 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index e5dbd8b63951..4649e8bc5034 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -24,6 +24,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-hdk.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-hdk.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> new file mode 100644
> index 000000000000..d35014bf4f81
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> @@ -0,0 +1,454 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "sm8250.dtsi"
> +#include "pm8150.dtsi"
> +#include "pm8150b.dtsi"
> +#include "pm8150l.dtsi"
> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. SM8250 HDK";
> +	compatible = "qcom,sm8250-hdk";

	compatible = "qcom,sm8250-hdk", "qcom,sm8250";

Apart from that this looks good!

Thanks,
Bjorn
Jonathan Marek May 29, 2020, 3:15 a.m. UTC | #8
On 5/28/20 11:05 PM, Bjorn Andersson wrote:
> On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> 
>> Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.
>>
>> Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
>> few changes. Notably, the HDK865 dts has regulator config changed a bit based
>> on downstream (I think sm8250-mtp.dts is wrong and copied too much from sm8150).
> 
> Can you please elaborate on this discrepancy? I do remember seeing
> something odd when looking at this, but it seems like I didn't document
> it anywhere...
> 
> Thanks,
> Bjorn
> 

Mainly there's a few regulators with different min/max voltage values. 
For example with l16a, downstream has min/max 3024000/3304000 but 
upstream sm8250-mtp has 2704000/2960000. I also added l18a.

>>
>> Jonathan Marek (6):
>>    arm64: dts: qcom: sm8150: add apps_smmu node
>>    arm64: dts: qcom: sm8250: add apps_smmu node
>>    arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes
>>    arm64: dts: qcom: sm8250: Add USB and PHY device nodes
>>    arm64: dts: qcom: add sm8150 hdk dts
>>    arm64: dts: qcom: add sm8250 hdk dts
>>
>>   arch/arm64/boot/dts/qcom/Makefile       |   2 +
>>   arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 461 ++++++++++++++++++++++++
>>   arch/arm64/boot/dts/qcom/sm8150.dtsi    | 180 +++++++++
>>   arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 454 +++++++++++++++++++++++
>>   arch/arm64/boot/dts/qcom/sm8250.dtsi    | 287 +++++++++++++++
>>   5 files changed, 1384 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/qcom/sm8150-hdk.dts
>>   create mode 100644 arch/arm64/boot/dts/qcom/sm8250-hdk.dts
>>
>> -- 
>> 2.26.1
>>
Jonathan Marek May 29, 2020, 3:34 a.m. UTC | #9
On 5/28/20 11:15 PM, Bjorn Andersson wrote:
> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
> 
>>
>>
>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>>> On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>>>
>>>> Add the apps_smmu node for sm8150. Note that adding the iommus field for
>>>> UFS is required because initializing the iommu removes the bypass mapping
>>>> that created by the bootloader.
>>>>
>>>
>>> Unrelated to the patch itself; how do you disable the splash screen on
>>> 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>>> me on the MTP - and hence this would prevent my device from booting.
>>>
>>> Thanks,
>>> Bjorn
>>>
>>
>> I don't have a MTP, but on HDK855, "fastboot oem select-display-panel none"
>> combined with setting the physical switch to HDMI mode (which switches off
>> the 1440x2560 panel) gets it to not setup the display at all (just the
>> fastboot command isn't enough).
>>
> 
> Okay, I don't think we have anything equivalent on the MTP, but good to
> know.
> 
>> With HDK865 though that doesn't work and I have a hack to work around it
>> (writing 0 to INTF_TIMING_ENGINE_EN early on in boot will stop video mode
>> scanout and it won't crash).
>>
> 
> Then we need to sort this out in the arm-smmu driver before we can
> enable the apps_smmu node on 8250. I did receive some guidance from Will
> on the subject and have started looking into this.
> 

That's annoying because a lot depends on apps_mmu. GPU is an exception 
with its own MMU but pretty much everything else uses apps_smmu (does it 
make sense to add USB nodes if it won't work without apps_smmu?) Is this 
something that will get resolved soon?

FWIW, I have another sm8250 board which does not need the workaround 
(its bootloader does not set up the display). AFAIK modifying the 
bootloader to not set up any display is a trivial modification (assuming 
that's an option).

> Thanks,
> Bjorn
> 
>>>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>>>>    1 file changed, 91 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> index a36512d1f6a1..acb839427b12 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>>>    			resets = <&gcc GCC_UFS_PHY_BCR>;
>>>>    			reset-names = "rst";
>>>> +			iommus = <&apps_smmu 0x300 0>;
>>>> +
>>>>    			clock-names =
>>>>    				"core_clk",
>>>>    				"bus_aggr_clk",
>>>> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>>>>    				compatible = "snps,dwc3";
>>>>    				reg = <0 0x0a600000 0 0xcd00>;
>>>>    				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>>>> +				iommus = <&apps_smmu 0x140 0>;
>>>>    				snps,dis_u2_susphy_quirk;
>>>>    				snps,dis_enblslpm_quirk;
>>>>    				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>>>> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>>>>    			cell-index = <0>;
>>>>    		};
>>>> +		apps_smmu: iommu@15000000 {
>>>> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
>>>> +			reg = <0 0x15000000 0 0x100000>;
>>>> +			#iommu-cells = <2>;
>>>> +			#global-interrupts = <1>;
>>>> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
>>>> +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
>>>> +		};
>>>> +
>>>>    		remoteproc_adsp: remoteproc@17300000 {
>>>>    			compatible = "qcom,sm8150-adsp-pas";
>>>>    			reg = <0x0 0x17300000 0x0 0x4040>;
>>>> -- 
>>>> 2.26.1
>>>>
Jonathan Marek June 4, 2020, 4:09 p.m. UTC | #10
On 6/4/20 11:58 AM, Manivannan Sadhasivam wrote:
> On Thu, Jun 04, 2020 at 10:06:19AM -0400, Jonathan Marek wrote:
>> On 6/4/20 9:52 AM, Manivannan Sadhasivam wrote:
>>> Hi,
>>>
>>> On Sat, May 23, 2020 at 10:38:06PM -0400, Jonathan Marek wrote:
>>>> Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.
>>>>
>>>
>>> I've tested this series on an SM8250 based board and able to get Type C (USB0)
>>> working. There are also couple of Type A ports (USB1) on that board behind a
>>> USB hub. It is probing fine but I don't see any activity while connecting a
>>> USB device. Will continue to debug and once I get them working, I'll add my
>>> Tested-by tag.
>>>
>>
>> HDK865 also has a couple Type A ports, I am using them with devices already
>> plugged in during boot and I haven't hit a problem like that, but I think
>> I've seen the same issue when hotplugging. IIRC the behavior was a bit
>> weird, like plugging a device in the Type A port (USB1) nothing would
>> happen, but unplugging/replugging the type C port (USB0) would cause the
>> Type A port device to start working..
>>
>> Have you tried with the devices already plugged in before booting?
>>
> 
> Tried it but no luck :/ Also plugging and removing Type C doesn't make any
> difference.
> 

This one might be obvious, but do you have 5V power coming out of the 
type A ports?

> Thanks,
> Mani
> 
>>> Thanks,
>>> Mani
>>>
>>>> Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
>>>> few changes. Notably, the HDK865 dts has regulator config changed a bit based
>>>> on downstream (I think sm8250-mtp.dts is wrong and copied too much from sm8150).
>>>>
>>>> Jonathan Marek (6):
>>>>     arm64: dts: qcom: sm8150: add apps_smmu node
>>>>     arm64: dts: qcom: sm8250: add apps_smmu node
>>>>     arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes
>>>>     arm64: dts: qcom: sm8250: Add USB and PHY device nodes
>>>>     arm64: dts: qcom: add sm8150 hdk dts
>>>>     arm64: dts: qcom: add sm8250 hdk dts
>>>>
>>>>    arch/arm64/boot/dts/qcom/Makefile       |   2 +
>>>>    arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 461 ++++++++++++++++++++++++
>>>>    arch/arm64/boot/dts/qcom/sm8150.dtsi    | 180 +++++++++
>>>>    arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 454 +++++++++++++++++++++++
>>>>    arch/arm64/boot/dts/qcom/sm8250.dtsi    | 287 +++++++++++++++
>>>>    5 files changed, 1384 insertions(+)
>>>>    create mode 100644 arch/arm64/boot/dts/qcom/sm8150-hdk.dts
>>>>    create mode 100644 arch/arm64/boot/dts/qcom/sm8250-hdk.dts
>>>>
>>>> -- 
>>>> 2.26.1
>>>>
Sai Prakash Ranjan June 5, 2020, 2:03 p.m. UTC | #11
On 2020-05-29 08:45, Bjorn Andersson wrote:
> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
> 
>> 
>> 
>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>> >
>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
>> > > UFS is required because initializing the iommu removes the bypass mapping
>> > > that created by the bootloader.
>> > >
>> >
>> > Unrelated to the patch itself; how do you disable the splash screen on
>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>> > me on the MTP - and hence this would prevent my device from booting.
>> >
>> > Thanks,
>> > Bjorn
>> >
>> 
>> I don't have a MTP, but on HDK855, "fastboot oem select-display-panel 
>> none"
>> combined with setting the physical switch to HDMI mode (which switches 
>> off
>> the 1440x2560 panel) gets it to not setup the display at all (just the
>> fastboot command isn't enough).
>> 
> 
> Okay, I don't think we have anything equivalent on the MTP, but good to
> know.
> 

Actually I tried out this in SM8150 MTP and it works fine for me,

"fastboot set_active a; fastboot set_active b; fastboot set_active a; 
fastboot oem select-display-panel none; fastboot reboot bootloader; 
fastboot boot boot-sm8150.img"

Also I need to switch slots everytime like above, otherwise I always see 
some error
while loading the boot image.

Thanks,
Sai
Sai Prakash Ranjan June 5, 2020, 2:13 p.m. UTC | #12
On 2020-06-05 19:40, Jonathan Marek wrote:
> On 6/5/20 10:03 AM, Sai Prakash Ranjan wrote:
>> On 2020-05-29 08:45, Bjorn Andersson wrote:
>>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
>>> 
>>>> 
>>>> 
>>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>>>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>>>> >
>>>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
>>>> > > UFS is required because initializing the iommu removes the bypass mapping
>>>> > > that created by the bootloader.
>>>> > >
>>>> >
>>>> > Unrelated to the patch itself; how do you disable the splash screen on
>>>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>>>> > me on the MTP - and hence this would prevent my device from booting.
>>>> >
>>>> > Thanks,
>>>> > Bjorn
>>>> >
>>>> 
>>>> I don't have a MTP, but on HDK855, "fastboot oem 
>>>> select-display-panel none"
>>>> combined with setting the physical switch to HDMI mode (which 
>>>> switches off
>>>> the 1440x2560 panel) gets it to not setup the display at all (just 
>>>> the
>>>> fastboot command isn't enough).
>>>> 
>>> 
>>> Okay, I don't think we have anything equivalent on the MTP, but good 
>>> to
>>> know.
>>> 
>> 
>> Actually I tried out this in SM8150 MTP and it works fine for me,
>> 
>> "fastboot set_active a; fastboot set_active b; fastboot set_active a; 
>> fastboot oem select-display-panel none; fastboot reboot bootloader; 
>> fastboot boot boot-sm8150.img"
>> 
>> Also I need to switch slots everytime like above, otherwise I always 
>> see some error
>> while loading the boot image.
>> 
> 
> What is the error? If it is "FAILED (remote: Failed to
> load/authenticate boot image: Load Error)" then flashing/erasing
> boot_a will make it go away ("fastboot erase boot_a") for the next 6
> or so "failed" boots.
> 

Yes this exact error.

-Sai
Sai Prakash Ranjan June 5, 2020, 2:15 p.m. UTC | #13
On 2020-05-25 15:07, Sai Prakash Ranjan wrote:
> Hi Jonathan,
> 
> On 2020-05-24 08:08, Jonathan Marek wrote:
>> Add the apps_smmu node for sm8150. Note that adding the iommus field 
>> for
>> UFS is required because initializing the iommu removes the bypass 
>> mapping
>> that created by the bootloader.
>> 
>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>> ---
>>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 
>> ++++++++++++++++++++++++++++
>>  1 file changed, 91 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> index a36512d1f6a1..acb839427b12 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>  			resets = <&gcc GCC_UFS_PHY_BCR>;
>>  			reset-names = "rst";
>> 
>> +			iommus = <&apps_smmu 0x300 0>;
>> +
>>  			clock-names =
>>  				"core_clk",
>>  				"bus_aggr_clk",
>> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>>  				compatible = "snps,dwc3";
>>  				reg = <0 0x0a600000 0 0xcd00>;
>>  				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> +				iommus = <&apps_smmu 0x140 0>;
>>  				snps,dis_u2_susphy_quirk;
>>  				snps,dis_enblslpm_quirk;
>>  				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>>  			cell-index = <0>;
>>  		};
>> 
>> +		apps_smmu: iommu@15000000 {
>> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
> 
> This should be qcom,sm8150-smmu-500 and also you need to update the 
> arm-smmu
> binding with this compatible in a separate patch.
> 

I tested out this series with my coresight patches for enabling SMMU 
translation
for ETR on SM8150, it works fine. With this above comment addressed and 
with
Bjorn's comments on commit description addressed,

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

Thanks,
Sai
Nicolas Dechesne June 5, 2020, 2:51 p.m. UTC | #14
On Fri, Jun 5, 2020 at 4:39 PM Sai Prakash Ranjan
<saiprakash.ranjan@codeaurora.org> wrote:
>
> Hi Nico,
>
> On 2020-06-05 20:01, Nicolas Dechesne wrote:
> > On Fri, Jun 5, 2020 at 4:14 PM Sai Prakash Ranjan
> > <saiprakash.ranjan@codeaurora.org> wrote:
> >>
> >> On 2020-06-05 19:40, Jonathan Marek wrote:
> >> > On 6/5/20 10:03 AM, Sai Prakash Ranjan wrote:
> >> >> On 2020-05-29 08:45, Bjorn Andersson wrote:
> >> >>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
> >> >>>
> >> >>>>
> >> >>>>
> >> >>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
> >> >>>> > On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> >> >>>> >
> >> >>>> > > Add the apps_smmu node for sm8150. Note that adding the iommus field for
> >> >>>> > > UFS is required because initializing the iommu removes the bypass mapping
> >> >>>> > > that created by the bootloader.
> >> >>>> > >
> >> >>>> >
> >> >>>> > Unrelated to the patch itself; how do you disable the splash screen on
> >> >>>> > 8150? "fastboot oem select-display-panel none" doesn't seem to work for
> >> >>>> > me on the MTP - and hence this would prevent my device from booting.
> >> >>>> >
> >> >>>> > Thanks,
> >> >>>> > Bjorn
> >> >>>> >
> >> >>>>
> >> >>>> I don't have a MTP, but on HDK855, "fastboot oem
> >> >>>> select-display-panel none"
> >> >>>> combined with setting the physical switch to HDMI mode (which
> >> >>>> switches off
> >> >>>> the 1440x2560 panel) gets it to not setup the display at all (just
> >> >>>> the
> >> >>>> fastboot command isn't enough).
> >> >>>>
> >> >>>
> >> >>> Okay, I don't think we have anything equivalent on the MTP, but good
> >> >>> to
> >> >>> know.
> >> >>>
> >> >>
> >> >> Actually I tried out this in SM8150 MTP and it works fine for me,
> >> >>
> >> >> "fastboot set_active a; fastboot set_active b; fastboot set_active a;
> >> >> fastboot oem select-display-panel none; fastboot reboot bootloader;
> >> >> fastboot boot boot-sm8150.img"
> >> >>
> >> >> Also I need to switch slots everytime like above, otherwise I always
> >> >> see some error
> >> >> while loading the boot image.
> >> >>
> >> >
> >> > What is the error? If it is "FAILED (remote: Failed to
> >> > load/authenticate boot image: Load Error)" then flashing/erasing
> >> > boot_a will make it go away ("fastboot erase boot_a") for the next 6
> >> > or so "failed" boots.
> >> >
> >>
> >> Yes this exact error.
> >
> > The bootloader maintains a 'boot status' in one of the partition
> > attributes. After a certain amount of 'failed' boot , it will switch
> > to the other boot partition. It's the same thing on RB3/DB845c. In our
> > release for DB845c, we are patching the bootloader so that this
> > behavior is bypassed. On typical 'product' there is a user space
> > application that will come and set the partition attribute to indicate
> > the boot was successful.
> >
> > For the record, this is the patch we use on 845c:
> > https://git.linaro.org/landing-teams/working/qualcomm/abl.git/commit/?h=release/LE.UM.2.3.7-09200-sda845.0&id=e3dc60213234ed626161a568ba587ddac63c5158
> >
> > rebuilding EDK2/ABL requires access to signing tools.. so it might not
> > be possible for everyone. but in case you can, it should be
> > straightforward to reuse this patch.
> >
>
> Thank you for these details and the patch, it's very useful.
> I do have access to ABL code and the signing tools and can build one.

Good. Then the next problem you will likely face is that building QCOM
ABL is far from being straightforward. Why would it be? ;)
That's the script we use to build it ourselves:
https://git.linaro.org/ci/job/configs.git/tree/lt-qcom-bootloader/dragonboard845c/builders.sh#n61

It has a reference to sectools which we have (internally) access to,
but you have it too, and you should be able to leverage most of the
script.

>
> Thanks,
> Sai
>
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
> member
> of Code Aurora Forum, hosted by The Linux Foundation
Jonathan Marek June 9, 2020, 7:42 p.m. UTC | #15
On 5/28/20 11:03 PM, Bjorn Andersson wrote:
> On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
> 
>> Add initial HDK865 dts, based on sm8250-mtp, with a few changes.
>> Notably, regulator configs are changed a bit.
>>
>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>> ---
>>   arch/arm64/boot/dts/qcom/Makefile       |   1 +
>>   arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 454 ++++++++++++++++++++++++
>>   2 files changed, 455 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/qcom/sm8250-hdk.dts
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index e5dbd8b63951..4649e8bc5034 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -24,6 +24,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm845-mtp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-hdk.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
>> +dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-hdk.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-mtp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/sm8250-hdk.dts b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
>> new file mode 100644
>> index 000000000000..d35014bf4f81
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/sm8250-hdk.dts
>> @@ -0,0 +1,454 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include "sm8250.dtsi"
>> +#include "pm8150.dtsi"
>> +#include "pm8150b.dtsi"
>> +#include "pm8150l.dtsi"
>> +
>> +/ {
>> +	model = "Qualcomm Technologies, Inc. SM8250 HDK";
>> +	compatible = "qcom,sm8250-hdk";
> 
> 	compatible = "qcom,sm8250-hdk", "qcom,sm8250";
> 
> Apart from that this looks good!
> 

Made this change for both HDK dts, but FYI the mtp dts do not have this.

> Thanks,
> Bjorn
>
Jonathan Marek June 9, 2020, 7:52 p.m. UTC | #16
On 5/28/20 11:42 PM, Bjorn Andersson wrote:
> On Thu 28 May 20:34 PDT 2020, Jonathan Marek wrote:
> 
>> On 5/28/20 11:15 PM, Bjorn Andersson wrote:
>>> On Thu 28 May 20:02 PDT 2020, Jonathan Marek wrote:
>>>
>>>>
>>>>
>>>> On 5/28/20 10:52 PM, Bjorn Andersson wrote:
>>>>> On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote:
>>>>>
>>>>>> Add the apps_smmu node for sm8150. Note that adding the iommus field for
>>>>>> UFS is required because initializing the iommu removes the bypass mapping
>>>>>> that created by the bootloader.
>>>>>>
>>>>>
>>>>> Unrelated to the patch itself; how do you disable the splash screen on
>>>>> 8150? "fastboot oem select-display-panel none" doesn't seem to work for
>>>>> me on the MTP - and hence this would prevent my device from booting.
>>>>>
>>>>> Thanks,
>>>>> Bjorn
>>>>>
>>>>
>>>> I don't have a MTP, but on HDK855, "fastboot oem select-display-panel none"
>>>> combined with setting the physical switch to HDMI mode (which switches off
>>>> the 1440x2560 panel) gets it to not setup the display at all (just the
>>>> fastboot command isn't enough).
>>>>
>>>
>>> Okay, I don't think we have anything equivalent on the MTP, but good to
>>> know.
>>>
>>>> With HDK865 though that doesn't work and I have a hack to work around it
>>>> (writing 0 to INTF_TIMING_ENGINE_EN early on in boot will stop video mode
>>>> scanout and it won't crash).
>>>>
>>>
>>> Then we need to sort this out in the arm-smmu driver before we can
>>> enable the apps_smmu node on 8250. I did receive some guidance from Will
>>> on the subject and have started looking into this.
>>>
>>
>> That's annoying because a lot depends on apps_mmu. GPU is an exception with
>> its own MMU but pretty much everything else uses apps_smmu (does it make
>> sense to add USB nodes if it won't work without apps_smmu?) Is this
>> something that will get resolved soon?
>>
> 
> We have a number of boards where this is becoming a critical issue, so
> we better find an acceptable solution to this very soon.
> 

I kept the sm8250 apps_smmu patch in V2:

I am now using a modified xbl with my HDK865, with a hack to make it use 
"none" for the display override string, and that allows me to use these 
patches without any kernel hack.

The "fastboot oem select-display-panel none" not working to disable 
bootloader enabled display definitely seems like a bug (I have not tried 
to debug it, but everything I've seen indicates that it should be 
disabling it). I don't think we should be holding this back based on a 
bootloader bug.

> Regards,
> Bjorn
> 
>> FWIW, I have another sm8250 board which does not need the workaround (its
>> bootloader does not set up the display). AFAIK modifying the bootloader to
>> not set up any display is a trivial modification (assuming that's an
>> option).
>>
>>> Thanks,
>>> Bjorn
>>>
>>>>>> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
>>>>>> ---
>>>>>>     arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++
>>>>>>     1 file changed, 91 insertions(+)
>>>>>>
>>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>>> index a36512d1f6a1..acb839427b12 100644
>>>>>> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>>> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
>>>>>> @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 {
>>>>>>     			resets = <&gcc GCC_UFS_PHY_BCR>;
>>>>>>     			reset-names = "rst";
>>>>>> +			iommus = <&apps_smmu 0x300 0>;
>>>>>> +
>>>>>>     			clock-names =
>>>>>>     				"core_clk",
>>>>>>     				"bus_aggr_clk",
>>>>>> @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 {
>>>>>>     				compatible = "snps,dwc3";
>>>>>>     				reg = <0 0x0a600000 0 0xcd00>;
>>>>>>     				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>>>>>> +				iommus = <&apps_smmu 0x140 0>;
>>>>>>     				snps,dis_u2_susphy_quirk;
>>>>>>     				snps,dis_enblslpm_quirk;
>>>>>>     				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
>>>>>> @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 {
>>>>>>     			cell-index = <0>;
>>>>>>     		};
>>>>>> +		apps_smmu: iommu@15000000 {
>>>>>> +			compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
>>>>>> +			reg = <0 0x15000000 0 0x100000>;
>>>>>> +			#iommu-cells = <2>;
>>>>>> +			#global-interrupts = <1>;
>>>>>> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
>>>>>> +				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
>>>>>> +		};
>>>>>> +
>>>>>>     		remoteproc_adsp: remoteproc@17300000 {
>>>>>>     			compatible = "qcom,sm8150-adsp-pas";
>>>>>>     			reg = <0x0 0x17300000 0x0 0x4040>;
>>>>>> -- 
>>>>>> 2.26.1
>>>>>>
Manivannan Sadhasivam June 11, 2020, 6:22 p.m. UTC | #17
On Thu, Jun 11, 2020 at 02:14:43PM -0400, Jonathan Marek wrote:
> On 6/11/20 2:05 PM, Manivannan Sadhasivam wrote:
> > On Thu, Jun 04, 2020 at 07:22:21PM +0530, Manivannan Sadhasivam wrote:
> > > Hi,
> > > 
> > > On Sat, May 23, 2020 at 10:38:06PM -0400, Jonathan Marek wrote:
> > > > Add dts nodes for apps_smmu and USB for both sm8150 and sm8250.
> > > > 
> > > 
> > > I've tested this series on an SM8250 based board and able to get Type C (USB0)
> > > working. There are also couple of Type A ports (USB1) on that board behind a
> > > USB hub. It is probing fine but I don't see any activity while connecting a
> > > USB device. Will continue to debug and once I get them working, I'll add my
> > > Tested-by tag.
> > > 
> > 
> > So it turned out that I forgot to enable one regulator which kept the USB hub
> > powered down. After enabling that, both Type A ports are working. Hence,
> > 
> > Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > 
> > Thanks,
> > Mani
> > 
> 
> Thanks for testing it. Your Tested-by only applies to the relevant patches
> (patches 2 and 4 in this version) right? And can I also add your Tested-by
> tag to my other series (https://patchwork.kernel.org/cover/11567095/) which
> this depends on?
> 

Sure. You can add it for all SM8250 USB patches.

Thanks,
Mani

> > > Thanks,
> > > Mani
> > > 
> > > > Also add initial dts files for HDK855 and HDK865, based on mtp dts, with a
> > > > few changes. Notably, the HDK865 dts has regulator config changed a bit based
> > > > on downstream (I think sm8250-mtp.dts is wrong and copied too much from sm8150).
> > > > 
> > > > Jonathan Marek (6):
> > > >    arm64: dts: qcom: sm8150: add apps_smmu node
> > > >    arm64: dts: qcom: sm8250: add apps_smmu node
> > > >    arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes
> > > >    arm64: dts: qcom: sm8250: Add USB and PHY device nodes
> > > >    arm64: dts: qcom: add sm8150 hdk dts
> > > >    arm64: dts: qcom: add sm8250 hdk dts
> > > > 
> > > >   arch/arm64/boot/dts/qcom/Makefile       |   2 +
> > > >   arch/arm64/boot/dts/qcom/sm8150-hdk.dts | 461 ++++++++++++++++++++++++
> > > >   arch/arm64/boot/dts/qcom/sm8150.dtsi    | 180 +++++++++
> > > >   arch/arm64/boot/dts/qcom/sm8250-hdk.dts | 454 +++++++++++++++++++++++
> > > >   arch/arm64/boot/dts/qcom/sm8250.dtsi    | 287 +++++++++++++++
> > > >   5 files changed, 1384 insertions(+)
> > > >   create mode 100644 arch/arm64/boot/dts/qcom/sm8150-hdk.dts
> > > >   create mode 100644 arch/arm64/boot/dts/qcom/sm8250-hdk.dts
> > > > 
> > > > -- 
> > > > 2.26.1
> > > >