From patchwork Fri Jul 14 05:08:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mrinmay Sarkar X-Patchwork-Id: 703308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71D1FEB64DA for ; Fri, 14 Jul 2023 05:09:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234819AbjGNFJF (ORCPT ); Fri, 14 Jul 2023 01:09:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234088AbjGNFJD (ORCPT ); Fri, 14 Jul 2023 01:09:03 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF7E32D5F; Thu, 13 Jul 2023 22:09:02 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 36E4oDBK017653; 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Fri, 14 Jul 2023 05:08:44 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 36E58igh001046; Fri, 14 Jul 2023 05:08:44 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-msarkar-hyd.qualcomm.com [10.213.111.194]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 36E58iHc001045; Fri, 14 Jul 2023 05:08:44 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3891782) id 7E451333B; Fri, 14 Jul 2023 10:38:43 +0530 (+0530) From: Mrinmay Sarkar To: agross@kernel.org, andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, mani@kernel.org Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, dmitry.baryshkov@linaro.org, Mrinmay Sarkar , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Vinod Koul , Kishon Vijay Abraham I , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH v2 0/6] arm64: qcom: sa8775p: add support for PCIe Date: Fri, 14 Jul 2023 10:38:32 +0530 Message-Id: <1689311319-22054-1-git-send-email-quic_msarkar@quicinc.com> X-Mailer: git-send-email 2.7.4 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 1PHCZOoD56ClsDRvoQ1aGbAcLtx4oUpg X-Proofpoint-GUID: 1PHCZOoD56ClsDRvoQ1aGbAcLtx4oUpg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-14_02,2023-07-13_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 bulkscore=0 phishscore=0 suspectscore=0 mlxlogscore=796 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2307140046 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Update the relavent DT bindings for PCIe, add new config to the phy driver add pcie and phy nodes to the .dtsi file and enable then in board .dts file for the sa8775p-ride platform. v1 -> v2: - correct indentationand sort compatible in qcom,pcie binding - correct clock name entry and sort compatible in pcie-phy binding - sort compatible and change commit message in qcom pcie driver - change offset name, added tx2 and rx2 offsets and sort compatible in qmp pcie phy driver - correct ranges property, added MSI, dma-coherent, cpu-pcie property removed iommus property moved pinctrl and gpio property to board dts and correct the allignment in pcie dtsi nodes - added pinctrl and gpio property in board dts Mrinmay Sarkar (6): dt-bindings: PCI: qcom: Add sa8775p compatible dt-bindings: phy: qcom,qmp: Add sa8775p QMP PCIe PHY PCI: qcom: Add support for sa8775p SoC phy: qcom-qmp-pcie: add support for sa8775p arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodes arm64: dts: qcom: sa8775p-ride: enable pcie nodes .../devicetree/bindings/pci/qcom,pcie.yaml | 28 ++ .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 19 +- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 80 +++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 204 +++++++++++- drivers/pci/controller/dwc/pcie-qcom.c | 1 + drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 341 +++++++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h | 1 + .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v5_20.h | 2 + 8 files changed, 673 insertions(+), 3 deletions(-)