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[v2,0/2] Add support for PCIe PHY in SDX65

Message ID 1678283688-4020-1-git-send-email-quic_rohiagar@quicinc.com
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Series Add support for PCIe PHY in SDX65 | expand

Message

Rohit Agarwal March 8, 2023, 1:54 p.m. UTC 
Hi,

Changes in v2:
 - Addressing Dmitry's comments and adjusting according to new bindings.
 - Rebased on top of 6.3-rc1.

This series adds support for PCIe PHY found in Qualcomm SDX65 platform.
The PHY version is v5.20 which has different register offsets compared with
previous v5.0x and v4.0x versions. So separate defines are introducted to
handle the differences.

Thanks,
Rohit.

Rohit Agarwal (2):
  dt-bindings: phy: qcom,qmp: Add SDX65 QMP PHY binding
  phy: qcom-qmp: Add support for SDX65 QMP PCIe PHY

 .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml   |   1 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c           | 165 +++++++++++++++++++++
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h |   3 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5_20.h      |   1 +
 .../phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v5_20.h |  24 +++
 5 files changed, 194 insertions(+)

Comments

Krzysztof Kozlowski March 9, 2023, 8:53 a.m. UTC | #1 
On 08/03/2023 14:54, Rohit Agarwal wrote:
> Add devicetree YAML binding for Qualcomm QMP Super Speed (SS) PHY found

Subject: drop second/last, redundant "binding". The "dt-bindings" prefix
is already stating that these are bindings.

> in SDX65.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>

With above:
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof