From patchwork Thu Feb 17 21:36:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuogee Hsieh X-Patchwork-Id: 543438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D98DC433EF for ; Thu, 17 Feb 2022 21:36:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245650AbiBQVg5 (ORCPT ); Thu, 17 Feb 2022 16:36:57 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:60302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229694AbiBQVgy (ORCPT ); Thu, 17 Feb 2022 16:36:54 -0500 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B6E813FB6; Thu, 17 Feb 2022 13:36:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1645133799; x=1676669799; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=yB4+2qoMQ9jzb08mZ+ScfZ64ApyU5Uo5M7VdvfRZWlY=; b=uGWiobsUg3cHxpWAG3FWFKrTSegiCIw6S4cCAwQ4dZCHQkV1POSBkVwz UYEuw4dIyfM9eP6LDtDPbhMTca348uIGWUDmNnGBPQfwe/07418u7KIOr 9rC94g49N1L49TUI3ydYOIR9C0fQclnZNQgLO0YSR69feE/ypkdHaGCjw g=; Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-01.qualcomm.com with ESMTP; 17 Feb 2022 13:36:38 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg05-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Feb 2022 13:36:38 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Thu, 17 Feb 2022 13:36:37 -0800 Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Thu, 17 Feb 2022 13:36:37 -0800 From: Kuogee Hsieh To: , , , , , , , , , CC: Kuogee Hsieh , , , , , , Subject: [PATCH v8 0/2] drm/msm/dpu: enable widebus feature base on chip hardware revision Date: Thu, 17 Feb 2022 13:36:24 -0800 Message-ID: <1645133788-5057-1-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org revise widebus timing engine programming and enable widebus feature base on chip Kuogee Hsieh (4): drm/msm/dpu: adjust display_v_end for eDP and DP drm/msm/dpu: replace BIT(x) with correspond marco define string drm/msm/dpu: revise timing engine programming to support widebus feature drm/msm/dp: enable widebus feature for display port drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 14 ++++- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 + .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 14 +++++ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 63 ++++++++++++++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 2 + drivers/gpu/drm/msm/dp/dp_catalog.c | 34 +++++++++++- drivers/gpu/drm/msm/dp/dp_catalog.h | 3 +- drivers/gpu/drm/msm/dp/dp_ctrl.c | 13 +++-- drivers/gpu/drm/msm/dp/dp_ctrl.h | 1 + drivers/gpu/drm/msm/dp/dp_display.c | 30 +++++++++++ drivers/gpu/drm/msm/dp/dp_display.h | 2 + drivers/gpu/drm/msm/dp/dp_panel.c | 4 +- drivers/gpu/drm/msm/dp/dp_panel.h | 2 +- drivers/gpu/drm/msm/msm_drv.h | 6 +++ 14 files changed, 164 insertions(+), 26 deletions(-) Reviewed-by: Dmitry Baryshkov