From patchwork Mon Jul 6 10:54:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 50714 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f69.google.com (mail-la0-f69.google.com [209.85.215.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id B71AC218EA for ; Mon, 6 Jul 2015 10:57:25 +0000 (UTC) Received: by laer2 with SMTP id r2sf45965747lae.3 for ; Mon, 06 Jul 2015 03:57:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:in-reply-to:references:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe:cc :mime-version:content-type:content-transfer-encoding:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list; bh=Ag1jeg1DLHFCHIU68pretlVhhekxYe5PFSUnrO2beGY=; b=RZYb68eMTdSBOV/lYQNQoLdxsLLLiiwlqlixIeN1F6hu1Djwy1tJT9x80im4WTKflj VNjl1DHIQtXCjuPCtrpqaEVX1mXojwMuZMzRY82M3O8ylLI8TXk640eE6hC63C5nfY9y nJy5rt31cAbFry6h/NIDWUutVklZNoCzOVdbU6z52vJTLJLsXOp4R37RJW3mzNEsSq9a ioJgSNI+ELOrcvf30ZlcJbpnHqvq6KD8pSGtTZCqYeYVFBCccn36Lqib4Rn1hOkmXwRj KFBYtq+KRgbdBX8mfK82Nz5bMX9XDdySUOYAHpM+wlkvPPg519UyGuZ1gDUbauKA7YPv NQtA== X-Gm-Message-State: ALoCoQkmXctxgKlQnLO68xqGHPp3U68CsCjrDtZLMwvzGG4Lo6rzW8rJW6RIOiAgUANZVL8VxLl1 X-Received: by 10.112.42.236 with SMTP id r12mr30486695lbl.2.1436180244684; Mon, 06 Jul 2015 03:57:24 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.163.65 with SMTP id yg1ls617531lab.26.gmail; Mon, 06 Jul 2015 03:57:24 -0700 (PDT) X-Received: by 10.112.217.2 with SMTP id ou2mr48499187lbc.15.1436180244522; Mon, 06 Jul 2015 03:57:24 -0700 (PDT) Received: from mail-la0-f43.google.com (mail-la0-f43.google.com. [209.85.215.43]) by mx.google.com with ESMTPS id x5si14945528laj.129.2015.07.06.03.57.24 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Jul 2015 03:57:24 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) client-ip=209.85.215.43; Received: by lagc2 with SMTP id c2so149759982lag.3 for ; Mon, 06 Jul 2015 03:57:24 -0700 (PDT) X-Received: by 10.152.206.75 with SMTP id lm11mr47358219lac.41.1436180244084; Mon, 06 Jul 2015 03:57:24 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp1642724lbb; Mon, 6 Jul 2015 03:57:23 -0700 (PDT) X-Received: by 10.66.142.42 with SMTP id rt10mr102854808pab.142.1436180242360; Mon, 06 Jul 2015 03:57:22 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id og14si28474322pdb.209.2015.07.06.03.57.21 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Jul 2015 03:57:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZC44B-0005Yd-Dl; Mon, 06 Jul 2015 10:56:03 +0000 Received: from mail-pa0-f49.google.com ([209.85.220.49]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZC445-0005PY-1b for linux-arm-kernel@lists.infradead.org; Mon, 06 Jul 2015 10:55:57 +0000 Received: by pactm7 with SMTP id tm7so93853200pac.2 for ; Mon, 06 Jul 2015 03:55:36 -0700 (PDT) X-Received: by 10.67.7.199 with SMTP id de7mr102518982pad.107.1436180136552; Mon, 06 Jul 2015 03:55:36 -0700 (PDT) Received: from localhost ([122.171.186.190]) by mx.google.com with ESMTPSA id x7sm17909995pas.28.2015.07.06.03.55.34 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 06 Jul 2015 03:55:35 -0700 (PDT) From: Viresh Kumar To: linux-arm-kernel@lists.infradead.org, Daniel Lezcano , linux@arm.linux.org.uk, arnd.bergmann@linaro.org, olof@lixom.net Subject: [PATCH 02/18] ARM/cns3xxx/timer: Migrate to new 'set-state' interface Date: Mon, 6 Jul 2015 16:24:09 +0530 Message-Id: X-Mailer: git-send-email 2.4.0 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150706_035557_128616_E8A69854 X-CRM114-Status: GOOD ( 15.10 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.49 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.220.49 listed in wl.mailspike.net] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: linaro-kernel@lists.linaro.org, Kevin Hilman , Viresh Kumar , arm@kernel.org, Krzysztof Halasa , Thomas Gleixner MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: viresh.kumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Migrate cns3xxx driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. NOTE: We don't read TIMER1_2_CONTROL_OFFSET register on shutdown anymore. Cc: Krzysztof Halasa Signed-off-by: Viresh Kumar --- arch/arm/mach-cns3xxx/core.c | 55 +++++++++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 4e9837ded96d..11f9644f8f41 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -113,30 +113,33 @@ void cns3xxx_power_off(void) */ static void __iomem *cns3xxx_tmr1; -static void cns3xxx_timer_set_mode(enum clock_event_mode mode, - struct clock_event_device *clk) +static int cns3xxx_shutdown(struct clock_event_device *clk) +{ + writel(0, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); + return 0; +} + +static int cns3xxx_set_oneshot(struct clock_event_device *clk) +{ + unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); + + /* period set, and timer enabled in 'next_event' hook */ + ctrl |= (1 << 2) | (1 << 9); + writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); + return 0; +} + +static int cns3xxx_set_periodic(struct clock_event_device *clk) { unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); int pclk = cns3xxx_cpu_clock() / 8; int reload; - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: - reload = pclk * 20 / (3 * HZ) * 0x25000; - writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); - ctrl |= (1 << 0) | (1 << 2) | (1 << 9); - break; - case CLOCK_EVT_MODE_ONESHOT: - /* period set, and timer enabled in 'next_event' hook */ - ctrl |= (1 << 2) | (1 << 9); - break; - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - default: - ctrl = 0; - } - + reload = pclk * 20 / (3 * HZ) * 0x25000; + writel(reload, cns3xxx_tmr1 + TIMER1_AUTO_RELOAD_OFFSET); + ctrl |= (1 << 0) | (1 << 2) | (1 << 9); writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET); + return 0; } static int cns3xxx_timer_set_next_event(unsigned long evt, @@ -151,12 +154,16 @@ static int cns3xxx_timer_set_next_event(unsigned long evt, } static struct clock_event_device cns3xxx_tmr1_clockevent = { - .name = "cns3xxx timer1", - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .set_mode = cns3xxx_timer_set_mode, - .set_next_event = cns3xxx_timer_set_next_event, - .rating = 350, - .cpumask = cpu_all_mask, + .name = "cns3xxx timer1", + .features = CLOCK_EVT_FEAT_PERIODIC | + CLOCK_EVT_FEAT_ONESHOT, + .set_state_shutdown = cns3xxx_shutdown, + .set_state_periodic = cns3xxx_set_periodic, + .set_state_oneshot = cns3xxx_set_oneshot, + .tick_resume = cns3xxx_shutdown, + .set_next_event = cns3xxx_timer_set_next_event, + .rating = 350, + .cpumask = cpu_all_mask, }; static void __init cns3xxx_clockevents_init(unsigned int timer_irq)