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[2001:1868:205::9]) by mx.google.com with ESMTPS id 73si11647380pfr.175.2015.12.17.02.32.53 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 17 Dec 2015 02:32:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a9VqY-0000GU-L5; Thu, 17 Dec 2015 10:31:42 +0000 Received: from mail-io0-x236.google.com ([2607:f8b0:4001:c06::236]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a9VqU-00007M-J8 for linux-arm-kernel@lists.infradead.org; Thu, 17 Dec 2015 10:31:39 +0000 Received: by mail-io0-x236.google.com with SMTP id o67so50267190iof.3 for ; Thu, 17 Dec 2015 02:31:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=OsngGwNUeWRqg7aKC13FtPY4xLojEFCKCJEdE8Z0isE=; b=Tzvi0UjAQ9apF8g+UI4t6sBzw6DQiGiwj4kSqvOYZknq3vgy2fzzl6mWthDpXmbdZm pi9DrJU55G6oWBXB+7DY34k/l+74ugwd0PkFUpbt8zoYUYCZeq3iZbqMtJZWsji2XA1v lXiebv6vPwR6ovxFCtneD13sbmFdYFLCkpTfE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=OsngGwNUeWRqg7aKC13FtPY4xLojEFCKCJEdE8Z0isE=; b=XpNyg439wWDACv9FI9buaDrZL1nuvdv2SMdZbRA56lhwwdGuwg1i/yYpEwB51tZg9J 8JJXuv7m9SYEBW7TV6pBN8y3lKcXztqmkEr13p2YAkPc+3SwltNfhKnj6oC1sHCB1sBK V+le8H0gMuPHvH7pBKPapgNbRUv6Yv9/Fa3l6FJXWJ6Z51pLuwgVC+eAvxDfmbhm9t3v Qv1//xThe7D8E3KHVSRzrOSHVFgrW4aX0NavS/0VPloXhktmOEHIVZorotquwnvOVeee wOTgU3az4iouh2sRlhE++r5S2rq7M0GWIRTwAn6U6Qj+Ve+vPJtyYtTCToXKuc28s0sy t3dw== X-Gm-Message-State: ALoCoQmI0jjIvsnn5z4DMctT/geXX8qSD3lf+4oQSB5sAG87wwXO0zYefo+t35mvA1XSKYhkHPQkv6fblrfnfP3fXxB+OsG76EGJcyP7DoRkNyh/YAoMQLw= MIME-Version: 1.0 X-Received: by 10.107.18.219 with SMTP id 88mr21014685ios.130.1450348277273; Thu, 17 Dec 2015 02:31:17 -0800 (PST) Received: by 10.36.29.6 with HTTP; Thu, 17 Dec 2015 02:31:17 -0800 (PST) In-Reply-To: <20151217102757.GF8644@n2100.arm.linux.org.uk> References: <1447397933-13379-1-git-send-email-ard.biesheuvel@linaro.org> <20151113184807.GA21047@codeaurora.org> <20151217102757.GF8644@n2100.arm.linux.org.uk> Date: Thu, 17 Dec 2015 11:31:17 +0100 Message-ID: Subject: Re: [PATCH] ARM: PJ4: move coprocessor register access sequences to iwmmxt.S From: Ard Biesheuvel To: Russell King - ARM Linux X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151217_023138_696727_57F65291 X-CRM114-Status: GOOD ( 23.21 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:4001:c06:0:0:0:236 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephen Boyd , "linux-arm-kernel@lists.infradead.org" , Nicolas Pitre Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org On 17 December 2015 at 11:27, Russell King - ARM Linux wrote: > On Fri, Nov 13, 2015 at 08:23:34PM +0100, Ard Biesheuvel wrote: >> On 13 November 2015 at 19:48, Stephen Boyd wrote: >> > On 11/13, Ard Biesheuvel wrote: >> >> The PJ4 inline asm sequences in pj4-cp0.c cannot be built in Thumb-2 mode, >> >> due to the way it performs arithmetic on the program counter, so it is >> >> built in ARM mode instead. However, building C files in ARM mode under >> >> CONFIG_THUMB2_KERNEL is problematic, since the instrumentation performed >> >> by subsystems like ftrace does not expect having to deal with interworking >> >> branches. >> >> >> >> So instead, revert to building pj4-cp0.c in Thumb-2 mode, and move the >> >> offending sequence to iwmmxt.S, which is not instrumented anyway, and is >> >> already built in ARM mode unconditionally. >> >> >> >> Reported-by: Stephen Boyd >> >> Signed-off-by: Ard Biesheuvel >> >> --- >> > >> > Tested-by: Stephen Boyd >> > >> >> Thanks. >> >> I've put this into the patch system (8452/1) > > And I've dropped it from my tree because it's broken. > > Come on guys, you can do better than this: > > arch/arm/kernel/built-in.o: In function `pj4_cp0_init': > arch/arm/kernel/psci-call.o:(.init.text+0x22d0): undefined reference to `pj4_cp_access_write' > arch/arm/kernel/psci-call.o:(.init.text+0x22e0): undefined reference to `pj4_cp_access_write' > arch/arm/kernel/psci-call.o:(.init.text+0x2304): undefined reference to `pj4_cp_access_read' > arch/arm/kernel/psci-call.o:(.init.text+0x2310): undefined reference to `pj4_cp_access_write' > arch/arm/kernel/psci-call.o:(.init.text+0x2314): undefined reference to `pj4_cp_access_read' > > Let's look at the makefile: > > obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o > obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o > obj-$(CONFIG_IWMMXT) += iwmmxt.o > > Now, you're moving code from pj4-cp0.c to iwmmxt.S, and of course, you > checked that IWMMXT would always be enabled if either PJ4 or PJ4B are > enabled. > > config IWMMXT > bool "Enable iWMMXt support" > depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B > default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B > > Err, no, IWMMXT can be disabled. Hence the build errors. > > Please, take more time when moving code around to ensure that this kind > of build breakage doesn't creep in. It's *really* easy to check, it > only takes a couple of additional minutes. > Yes, I was just looking into it after Arnd mentioned it over IRC If you can live with not having the pr_info() that warns you when running on a PJ4 with iWMMXt while CONFIG_IWMMXT is disabled, I could just drop pj4-cp0.c from the build entirely, i.e., http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index af9e59bf3831..9d798fb17359 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -67,13 +67,12 @@ obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o -obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o -obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o -obj-$(CONFIG_IWMMXT) += iwmmxt.o +iwmmxt-obj-$(CONFIG_CPU_PJ4) := pj4-cp0.o +iwmmxt-obj-$(CONFIG_CPU_PJ4B) := pj4-cp0.o +obj-$(CONFIG_IWMMXT) += iwmmxt.o $(iwmmxt-obj-y) obj-$(CONFIG_PERF_EVENTS) += perf_regs.o perf_callchain.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_xscale.o perf_event_v6.o \ perf_event_v7.o _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org