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[2001:1868:205::9]) by mx.google.com with ESMTPS id f189si13054875pfb.129.2016.04.20.04.08.08 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Apr 2016 04:08:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aspyL-0007Jf-FL; Wed, 20 Apr 2016 11:07:05 +0000 Received: from mail-ig0-x229.google.com ([2607:f8b0:4001:c05::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aspy6-000770-H6 for linux-arm-kernel@lists.infradead.org; Wed, 20 Apr 2016 11:06:51 +0000 Received: by mail-ig0-x229.google.com with SMTP id gy3so125013770igb.0 for ; Wed, 20 Apr 2016 04:06:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc; bh=xjBKtW4mnwLPIfL/tLoeUpNeUyjsd94M0CVhfCY+/YA=; b=Y59HaAt8kNk8FbSC/yjGefFHOgJUz99aQ7BsReNZx3d8DefxdgFLy3YvHy1Ku9kuyN 2ZmcvKtHWndZ7NgFjCU86zPUK7Avc8F7benxHA6NHYTqfevouYxuF+UyQKQ/9iy7H96Q OCWjLv/t+TLeG0KpqxC170/BvWogJENRFFA10= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc; bh=xjBKtW4mnwLPIfL/tLoeUpNeUyjsd94M0CVhfCY+/YA=; b=bM9drX6T+2mVD5VZgWnKJ6pKOx4rxs8srxJnC4LF11MrFWzGUkJtZEVhxYUQ8efBdo V+H21Ud+oheQx+w5uTyGxJb0F5q1Q2QlLZK4lxFKP8cuKXRSW+AvSI/LG3PzG49E5pVl C/ww+L23YjSicDRR0R98Kxxy3PtfHLpDiBdd5WWMO2w29pmtFSQftmrXkp6N5+NKreVZ SG6l1QYwllI+QLdkeiH/vS3ZueINQXKnuipb1b2sg7OO0vA/SI2rMaC9iaz7xZWXp/Bl 2rL3dcr+zRyDO6Po30SgWHAZENsUCHXKGCUuRAyzNeV5nKjilNI2tRluoc/f14uTAyon 0t0Q== X-Gm-Message-State: AOPr4FV3fWki1uogl2497pJl9VJDIaS6vZPJWAtOpgC+JQDXVi07+uKAjTUZdLSHgR2FO2r64ggD129NAmFjXT3H MIME-Version: 1.0 X-Received: by 10.50.180.202 with SMTP id dq10mr2886790igc.37.1461150389015; Wed, 20 Apr 2016 04:06:29 -0700 (PDT) Received: by 10.36.139.197 with HTTP; Wed, 20 Apr 2016 04:06:28 -0700 (PDT) In-Reply-To: <20160420110021.GH31470@pengutronix.de> References: <20160419140220.GA9503@pengutronix.de> <20160420092516.GA21732@e103592.cambridge.arm.com> <20160420095541.GG31470@pengutronix.de> <20160420110021.GH31470@pengutronix.de> Date: Wed, 20 Apr 2016 13:06:28 +0200 Message-ID: Subject: Re: SoCFPGA with CONFIG_THUMB2_KERNEL boot error From: Ard Biesheuvel To: Sascha Hauer X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160420_040650_861150_7111DC9C X-CRM114-Status: GOOD ( 20.87 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , kernel@pengutronix.de, Dinh Nguyen , Steffen Trumtrar , Dave Martin , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org On 20 April 2016 at 13:00, Sascha Hauer wrote: > On Wed, Apr 20, 2016 at 12:26:22PM +0200, Ard Biesheuvel wrote: >> On 20 April 2016 at 11:55, Sascha Hauer wrote: >> > On Wed, Apr 20, 2016 at 11:43:30AM +0200, Ard Biesheuvel wrote: >> >> (replying to self) >> >> >> >> On 20 April 2016 at 11:39, Ard Biesheuvel wrote: >> >> > (+ Arnd) >> >> > >> >> > On 20 April 2016 at 11:25, Dave Martin wrote: >> >> >> On Tue, Apr 19, 2016 at 04:02:20PM +0200, Steffen Trumtrar wrote: >> >> >>> Hi! >> >> >>> >> >> >>> According to kernelci.org (and validating on my own hardware), the current >> >> >>> socfpga mainline kernel has an issue with CONFIG_THUMB2_KERNEL enabled. >> >> >>> >> >> >>> https://storage.kernelci.org/mainline/v4.6-rc4-11-g12566cc35d0e/arm-multi_v7_defconfig/lab-khilman/boot-socfpga_cyclone5_de0_sockit.html >> >> >>> >> >> >>> vs >> >> >>> >> >> >>> https://storage.kernelci.org/mainline/v4.6-rc4-11-g12566cc35d0e/arm-multi_v7_defconfig+CONFIG_THUMB2_KERNEL=y/lab-khilman/boot-socfpga_cyclone5_de0_sockit.html >> >> >>> >> >> >>> Both boot successfully, but notice that the board fails to bring up CPU1 if >> >> >>> thumb2 support is enabled. >> >> >>> >> >> >>> Any ideas why this might be happening? >> >> >> >> >> >> >> Actually, this looks like a problem with the secondary entry point to >> >> me. Could you try this? >> > >> > Been there, done that. Unfortunately this does not solve the problem. >> > >> >> How about if you put this on top? >> >> diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S >> index 5d94b7a2fb10..c160fa3007e9 100644 >> --- a/arch/arm/mach-socfpga/headsmp.S >> +++ b/arch/arm/mach-socfpga/headsmp.S >> @@ -13,6 +13,7 @@ >> #include >> >> .arch armv7-a >> + .arm > > \o/ > > This did the trick, it now boots with two cpus up. Thanks for looking > into this issue. > > I'll create a patch for this. > Great. I think just the last part may be sufficient, since the bx r4 in headsmp.S will do an interworking branch to Thumb2 Also, I noticed that the code in headsmp.S looks a bit strange. You should really only need this: -------8<----------- _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S index 5d94b7a2fb10..7e4ab55cc529 100644 --- a/arch/arm/mach-socfpga/headsmp.S +++ b/arch/arm/mach-socfpga/headsmp.S @@ -13,6 +13,7 @@ #include .arch armv7-a + .arm ENTRY(secondary_trampoline) /* CPU1 will always fetch from 0x0 when it is brought out of reset. @@ -21,15 +22,9 @@ ENTRY(secondary_trampoline) * where the physical memory does not start at 0x0. */ ARM_BE8(setend be) - adr r0, 1f - ldmia r0, {r1, r2} - sub r2, r2, #PAGE_OFFSET + ldr r2, =socfpga_cpu1start_addr - PAGE_OFFSET ldr r3, [r2] ldr r4, [r3] ARM_BE8(rev r4, r4) bx r4 - - .align -1: .long . - .long socfpga_cpu1start_addr ENTRY(secondary_trampoline_end)