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[2001:1868:205::9]) by mx.google.com with ESMTPS id rm2si950345pbc.77.2015.09.24.16.20.59 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Sep 2015 16:20:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZfFnl-0002wO-1o; Thu, 24 Sep 2015 23:19:45 +0000 Received: from mail-io0-f171.google.com ([209.85.223.171]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZfFni-0002oy-Ji for linux-arm-kernel@lists.infradead.org; Thu, 24 Sep 2015 23:19:43 +0000 Received: by iofh134 with SMTP id h134so93762793iof.0 for ; Thu, 24 Sep 2015 16:19:21 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.107.169.234 with SMTP id f103mr3313180ioj.130.1443136761082; Thu, 24 Sep 2015 16:19:21 -0700 (PDT) Received: by 10.36.138.69 with HTTP; Thu, 24 Sep 2015 16:19:21 -0700 (PDT) In-Reply-To: References: <1442968663-31843-1-git-send-email-ard.biesheuvel@linaro.org> <560426BF.4030300@arm.com> Date: Thu, 24 Sep 2015 16:19:21 -0700 Message-ID: Subject: Re: [PATCH v2 0/7] arm64: relax Image placement rules From: Ard Biesheuvel To: "Suzuki K. Poulose" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150924_161942_729135_8E0A5511 X-CRM114-Status: GOOD ( 21.10 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.223.171 listed in wl.mailspike.net] -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.223.171 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , Will Deacon , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 On 24 September 2015 at 09:38, Ard Biesheuvel wrote: > On 24 September 2015 at 09:37, Suzuki K. Poulose wrote: >> On 23/09/15 01:37, Ard Biesheuvel wrote: >>> >>> This is a followup to the "arm64: update/clarify/relax Image and FDT >>> placement >>> rules" series I sent a while ago: >>> (http://article.gmane.org/gmane.linux.ports.arm.kernel/407148) >>> >>> This has now been split in two series: this second series deals with the >>> physical and virtual placement of the kernel Image. >>> >>> This series updates the mapping of the kernel Image and the linear mapping >>> of >>> system memory to allow more freedom in the choice of placement without >>> affecting >>> the accessibility of system RAM below the kernel Image, and the mapping >>> efficiency (i.e., memory can always be mapped in 512 MB or 1 GB blocks). >>> >> >> Ard, >> >> I gave your series a quick run and dumping the kernel page tables(with >> CONFIG_ARM64_PTDUMP) >> I find this problem : >> >> ... >> >> ---[ Kernel Mapping ]--- >> 0xffffffbffc000000-0xffffffbffc600000 6M RW x SHD AF >> MEM/NORMAL ***** >> 0xffffffbffc600000-0xffffffbffc7f5000 2004K RW x SHD AF UXN >> MEM/NORMAL >> 0xffffffbffc7f5000-0xffffffbffc875000 512K RW NX SHD AF UXN >> MEM/NORMAL >> 0xffffffbffc875000-0xffffffbffca00000 1580K RW x SHD AF UXN >> MEM/NORMAL >> ---[ Linear Mapping ]--- >> 0xffffffc000000000-0xffffffc040000000 1G RW NX SHD AF UXN >> MEM/NORMAL >> >> >> Note that the first mapping in the kernel doesn't have UXN set, which is a >> regression. >> I haven't started digging into it yet, but I thought I will point it out >> here, in case you >> already fixed it. >> > > Ok, thanks for pointing that out. I will look into it. > Turns out that, since the kernel mapping is not overwritten by the linear mapping, it retains the original permissions assigned in head.S. So this is enough to fix it """ """ >> Note: I see that you have used CONFIG_ARM64_64K_PAGES to handle >> section/table mapping >> (which I have tried to cleanup in 16K page size series and which is not >> merged yet). >> We should be careful when we merge our patches, as we could miss such new >> cases. >> > > I was aware of this, and I think it makes sense to the 16 KB pages to > be merged first, and then I will rebase these patches on top of it. > Do you have a git tree with the latest version? diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 2df4a55f00d4..fcd250cff4bf 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -62,8 +62,8 @@ /* * Initial memory map attributes. */ -#define PTE_FLAGS PTE_TYPE_PAGE | PTE_AF | PTE_SHARED -#define PMD_FLAGS PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S +#define PTE_FLAGS PTE_TYPE_PAGE | PTE_AF | PTE_SHARED | PTE_UXN +#define PMD_FLAGS PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S | PMD_SECT_UXN #ifdef CONFIG_ARM64_64K_PAGES #define MM_MMUFLAGS PTE_ATTRINDX(MT_NORMAL) | PTE_FLAGS