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[209.85.217.174]) by mx.google.com with ESMTPS id e8si5400743laa.121.2015.09.05.07.42.11 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 05 Sep 2015 07:42:11 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) client-ip=209.85.217.174; Received: by lbbmp1 with SMTP id mp1so23677458lbb.1 for ; Sat, 05 Sep 2015 07:42:11 -0700 (PDT) X-Received: by 10.112.16.135 with SMTP id g7mr8777826lbd.19.1441464131021; Sat, 05 Sep 2015 07:42:11 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.164.42 with SMTP id yn10csp548756lbb; Sat, 5 Sep 2015 07:42:08 -0700 (PDT) X-Received: by 10.107.3.170 with SMTP id e42mr16315421ioi.72.1441464128681; Sat, 05 Sep 2015 07:42:08 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d1si10370081pdh.123.2015.09.05.07.42.07; Sat, 05 Sep 2015 07:42:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751212AbbIEOmH (ORCPT + 1 other); Sat, 5 Sep 2015 10:42:07 -0400 Received: from mail-wi0-f172.google.com ([209.85.212.172]:33843 "EHLO mail-wi0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751034AbbIEOmG (ORCPT ); Sat, 5 Sep 2015 10:42:06 -0400 Received: by wicfx3 with SMTP id fx3so47750693wic.1 for ; Sat, 05 Sep 2015 07:42:04 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.181.12.5 with SMTP id em5mr17976728wid.67.1441464124242; Sat, 05 Sep 2015 07:42:04 -0700 (PDT) Received: by 10.194.74.106 with HTTP; Sat, 5 Sep 2015 07:42:03 -0700 (PDT) In-Reply-To: <55E87095.4030600@arm.com> References: <20150810232312.GB10728@bivouac.eciton.net> <55E81F93.1020104@arm.com> <20150903155255.GA28336@kroah.com> <55E87095.4030600@arm.com> Date: Sat, 5 Sep 2015 22:42:03 +0800 Message-ID: Subject: Re: earlycon issues in -next with amba-pl011 updates From: Jun Nie To: Marc Zyngier Cc: Greg Kroah-Hartman , Leif Lindholm , Tyler Baker , linux-arm-kernel@lists.infradead.org, linux-serial@vger.kernel.org Sender: linux-serial-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-serial@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: jun.nie@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , 2015-09-04 0:08 GMT+08:00 Marc Zyngier : > On 03/09/15 16:52, Greg Kroah-Hartman wrote: >> On Thu, Sep 03, 2015 at 11:23:15AM +0100, Marc Zyngier wrote: >>> On 11/08/15 02:48, Jun Nie wrote: >>>> 2015-08-11 7:23 GMT+08:00 Leif Lindholm : >>>>> Hi all, >>>>> >>>>> The kernelci.org bot picked up a complete boot failure (no output past >>>>> UEFI stub) with next-20150806 and Tyler bisected it down to somewhere >>>>> in >>>>> 8cd90e5 uart: pl011: Add support to ZTE ZX296702 uart >>>>> 09dcc7d uart: pl011: Improve LCRH register access decision >>>>> 2c096a9 uart: pl011: Introduce register look up table >>>>> 7b753f3 uart: pl011: Introduce register accessor >>>>> >>>>> The issue only appears with earlycon on command line, for pl011 >>>>> consoles. >>>>> >>>>> Some investigation shows that the cause lies with >>>>> commit 7b753f318d14 ("uart: pl011: Introduce register accessor") >>>>> and >>>>> commit 2c096a9eedc6 ("uart: pl011: Introduce register look up table") >>>>> >>>>> Specifically, the changes to pl011_putc() are incorrect: >>>>> The new pl011_ accessors take a (struct uart_amba_port *) input, but >>>>> pl011_putc() directly uses the incoming (struct uart_port *) for this. >>>>> >>>>> Apart from ending up with an unintended/incorrect UART base address, >>>>> the introduction of the lookup table for register offsets also means >>>>> the accessors try to dereference (struct uart_amba_port *)->reg_lut. >>>>> >>>>> The below is a hack that shows/resolves the issue, but some >>>>> refactoring of the original patches might be in order. >>>>> >>>>> / >>>>> Leif >>>> >>>> Leif, >>>> >>>> Sorry for the inconvenience. I do not have idea of early console till >>>> now and I always have debug console for early panic debug. Learned >>>> more from this issue. >>>> >>>> Suppose Peter's patch will resolve your issue. >>> >>> [+ Greg KH] >>> >>> So -next has now been broken for a while on a number of ARM platforms >>> because of this (they simply cannot boot), and no progress has been made >>> towards resolving this problem. >>> >>> Can we please drop this series (at least commits 7b753f3 and following) >>> from -next until is has been reworked and reviewed? >> >> I don't have any patches in my -next tree, everything is in Linus's tree >> now. So if I've missed something, or need to revert something, please >> let me know specifcally what to do. > > Gahhh... Given that there is no obvious fix, that the discussion has > stalled and that the author of the series is apparently away, the > following patches should be reverted: Marc, There had a patch from Peter that revert early console part, which I thought will be merged to mainline. It's my fault for not fix the bug on time. Also sorry for late response to you as I took three days leave. Could you help test attached patch? Thank you in advance! Greg, Would you please hold the merging of revert patches for one or two days so that the fix can be verified? Thank you! Jun > > 8cd90e50d140 uart: pl011: Add support to ZTE ZX296702 uart > 09dcc7dfc05b uart: pl011: Improve LCRH register access decision > 2c096a9eedc6 uart: pl011: Introduce register look up table > 7b753f318d14 uart: pl011: Introduce register accessor > 534e14e2293d uart: pl011: Rename regs with enumeration > > (7b753f318d14 being the one breaking everything, but it makes more sense > to revert the whole series until it is properly fixed and reviewed). > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny... >From fdf1ed2346b12904bcd65a16e33ce12c7d84a2c7 Mon Sep 17 00:00:00 2001 From: Jun Nie Date: Sat, 5 Sep 2015 22:32:40 +0800 Subject: [PATCH] serial: pl011: Fix earlycon register LUT breakage Commit 7b753f318d14 ("uart: pl011: Introduce register accessor") mistakenly used the register LUT i/o accessors for the pl011 earlycon. Since the port has not been probed at earlycon time, the struct uart_amba_port (and register LUTs) are uninitialized. Use direct register addressing for pl011 earlycon; other h/w supported by the amba-pl011 driver should declare an alternate earlycon. Signed-off-by: Peter Hurley Signed-off-by: Jun Nie --- drivers/tty/serial/amba-pl011.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index 2af09ab..22893d0 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -326,12 +326,6 @@ static void pl011_writew(struct uart_amba_port *uap, int val, int index) writew_relaxed(val, uap->port.membase + uap->reg_lut[index]); } -static void pl011_writeb(struct uart_amba_port *uap, u8 val, int index) -{ - WARN_ON(index > REG_NR); - writeb_relaxed(val, uap->port.membase + uap->reg_lut[index]); -} - /* * Reads up to 256 characters from the FIFO or until it's empty and * inserts them into the TTY layer. Returns the number of characters @@ -2351,10 +2345,10 @@ static void pl011_putc(struct uart_port *port, int c) struct uart_amba_port *uap = container_of(port, struct uart_amba_port, port); - while (pl011_readw(uap, REG_FR) & UART01x_FR_TXFF) + while (readw_relaxed(port->membase + UART01x_FR) & UART01x_FR_TXFF) ; - pl011_writeb(uap, c, REG_DR); - while (pl011_readw(uap, REG_FR) & uap->fr_busy) + writeb_relaxed(c, port->membase + UART01x_DR); + while (readw_relaxed(port->membase + UART01x_FR) & uap->fr_busy) ; } -- 1.9.1