From patchwork Mon Oct 13 12:10:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 38646 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ee0-f69.google.com (mail-ee0-f69.google.com [74.125.83.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 3D7732039B for ; Mon, 13 Oct 2014 12:11:11 +0000 (UTC) Received: by mail-ee0-f69.google.com with SMTP id b57sf758548eek.0 for ; Mon, 13 Oct 2014 05:11:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:message-id:date:from:user-agent :mime-version:to:cc:subject:references:in-reply-to:sender:precedence :list-id:x-original-sender:x-original-authentication-results :mailing-list:list-post:list-help:list-archive:list-unsubscribe :content-type; bh=aDxOHmzzN/EFlGSFyTFCRegdGVR2qMOZsnlwgQCtp0c=; b=l77LwwB+g9Vxc4FoFvh0CxgZkGrNx8kAS97IM6hCdQw1rtFhTHL1V6K9qC84lUl2Ak +KwNL8oW0UvJKVNHkKS1E3c2IE5GY22EA0dtE4ooEVMU8FJ4I/JDkBCTXLo2jOV5QwQS 5Tc44VhvnVvImby5O6VW88KlSAQvTnn9anlamijgjEIJR56BzDBIZ2xCLhr4M6NnI+R0 BGbr2GENKcqr3QHcl8BbmtVOvAVQHoJkp+LGtn2xl+fP/Cyj7Vj/oJ6pW0k3+7BmyQ8y xEb6xHGnwsM4rLLBC/o5/V9fpKyxUU/E1QOz2SHASQJBRdJUAvL6f1zdXW+/nCVPj4iS ij5g== X-Gm-Message-State: ALoCoQknQaPVsrOlhJXmvfI5kAPLQqbevbQ1cZTj9uiCNmlZWkgr6/UEE56lYwu8u3jLJtH3uuwv X-Received: by 10.180.105.74 with SMTP id gk10mr126467wib.0.1413202270365; Mon, 13 Oct 2014 05:11:10 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.37.1 with SMTP id u1ls493585laj.29.gmail; Mon, 13 Oct 2014 05:11:10 -0700 (PDT) X-Received: by 10.112.150.170 with SMTP id uj10mr23424936lbb.72.1413202270164; Mon, 13 Oct 2014 05:11:10 -0700 (PDT) Received: from mail-lb0-f169.google.com (mail-lb0-f169.google.com [209.85.217.169]) by mx.google.com with ESMTPS id d9si21917377lad.79.2014.10.13.05.11.09 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 13 Oct 2014 05:11:09 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) client-ip=209.85.217.169; Received: by mail-lb0-f169.google.com with SMTP id 10so6303770lbg.14 for ; Mon, 13 Oct 2014 05:11:09 -0700 (PDT) X-Received: by 10.112.62.200 with SMTP id a8mr23503125lbs.34.1413202269716; Mon, 13 Oct 2014 05:11:09 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.84.229 with SMTP id c5csp200964lbz; Mon, 13 Oct 2014 05:11:07 -0700 (PDT) X-Received: by 10.68.111.99 with SMTP id ih3mr3188785pbb.124.1413202267023; Mon, 13 Oct 2014 05:11:07 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id zc9si10124989pac.235.2014.10.13.05.11.05 for ; Mon, 13 Oct 2014 05:11:07 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753938AbaJMMKx (ORCPT + 27 others); Mon, 13 Oct 2014 08:10:53 -0400 Received: from service87.mimecast.com ([91.220.42.44]:37229 "EHLO service87.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753907AbaJMMKu (ORCPT ); Mon, 13 Oct 2014 08:10:50 -0400 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Mon, 13 Oct 2014 13:10:34 +0100 Received: from [10.1.209.143] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 13 Oct 2014 13:10:34 +0100 Message-ID: <543BC138.3010109@arm.com> Date: Mon, 13 Oct 2014 13:10:32 +0100 From: Marc Zyngier User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130330 Thunderbird/17.0.5 MIME-Version: 1.0 To: "Joe.C" CC: Mark Rutland , "arm@kernel.org" , Rob Herring , Thomas Gleixner , Jiang Liu , "linux-arm-kernel@lists.infradead.org" , "srv_heupstream@mediatek.com" , "yingjoe.chen@gmail.com" , "hc.yen@mediatek.com" , "eddie.huang@mediatek.com" , "nathan.chung@mediatek.com" , "yh.chen@mediatek.com" , Sascha Hauer , Olof Johansson , Arnd Bergmann , Pawel Moll , Russell King , Jason Cooper , Benjamin Herrenschmidt , Santosh Shilimkar , Matt Porter , Marc Carino , Florian Fainelli , Sricharan R , Matthias Brugger , "grant.likely@linaro.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v3 3/7] irqchip: gic: Support hierarchy irq domain. References: <1412864980-20273-1-git-send-email-yingjoe.chen@mediatek.com> <1412864980-20273-4-git-send-email-yingjoe.chen@mediatek.com> <5436BF0C.1030508@arm.com> <1413196996.23455.9.camel@mtksdaap41> In-Reply-To: <1413196996.23455.9.camel@mtksdaap41> X-Enigmail-Version: 1.4.6 X-OriginalArrivalTime: 13 Oct 2014 12:10:34.0265 (UTC) FILETIME=[B0EF8890:01CFE6DE] X-MC-Unique: 114101313103401001 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: marc.zyngier@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On 13/10/14 11:43, Joe.C wrote: > On Thu, 2014-10-09 at 17:59 +0100, Marc Zyngier wrote: >> On 09/10/14 15:29, Joe.C wrote >>> @@ -952,7 +988,11 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, >>> >>> gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ >>> >>> - if (of_property_read_u32(node, "arm,routable-irqs", >>> + if (IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) && >>> + of_find_property(node, "arm,irq-domain-hierarchy", NULL)) >>> + gic->domain = irq_domain_add_linear(node, gic_irqs, >>> + &gic_irq_domain_hierarchy_ops, gic); >> >> I really think that looking for a property is the wrong thing to do. If >> "node" is non-NULL, then we're pretty sure that we're initializing from >> DT, and that a pure linear domain should be the right thing, leaving the >> legacy stuff for the few non-DT platforms that are still around. >> >> Thanks, >> >> M. > > The only reason I introduce "arm,irq-domain-hierarchy" property is > trying to keep original behavior when hierarchy irq domain is not used. > Without this, when a board init GIC with DT, all driver will have to use > devicetree. I'm not sure we want to break things like this. I don't think we want to support a "middle of the road" setup, where the GIC is probed by DT, but some devices have hardcoded interrupts. > I will remove this and just use linear for all DT in my next version. I came up with the attached patch, which allows me to boot my test platform (together with the other fix I posted earlier). Thanks, M. >From 97d4ea1f0922fb47dd1b09cd2694b7fa5b519db9 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Mon, 13 Oct 2014 10:57:28 +0100 Subject: [PATCH] fixup! irqchip: gic: Support hierarchy irq domain. --- drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-gic.c | 53 ++++++++++++++++++++++------------------------- 2 files changed, 26 insertions(+), 28 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index b8632bf..2a48e0a 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -5,6 +5,7 @@ config IRQCHIP config ARM_GIC bool select IRQ_DOMAIN + select IRQ_DOMAIN_HIERARCHY select MULTI_IRQ_HANDLER config GIC_NON_BANKED diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 17f5aa6..a99c211 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -835,8 +835,6 @@ static struct notifier_block gic_cpu_notifier = { }; #endif - -#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY static int gic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *arg) { @@ -870,10 +868,8 @@ static void gic_irq_domain_free(struct irq_domain *domain, unsigned int virq, static const struct irq_domain_ops gic_irq_domain_hierarchy_ops = { .alloc = gic_irq_domain_alloc, .free = gic_irq_domain_free, + .xlate = gic_irq_domain_xlate, }; -#else -#define gic_irq_domain_hierarchy_ops 0 -#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ static const struct irq_domain_ops gic_irq_domain_ops = { .map = gic_irq_domain_map, @@ -965,18 +961,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic_cpu_map[i] = 0xff; /* - * For primary GICs, skip over SGIs. - * For secondary GICs, skip over PPIs, too. - */ - if (gic_nr == 0 && (irq_start & 31) > 0) { - hwirq_base = 16; - if (irq_start != -1) - irq_start = (irq_start & ~31) + 16; - } else { - hwirq_base = 32; - } - - /* * Find out how many interrupts are supported. * The GIC only supports up to 1020 interrupt sources. */ @@ -986,14 +970,31 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic_irqs = 1020; gic->gic_irqs = gic_irqs; - gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ + if (node) { /* DT case */ + const struct irq_domain_ops *ops = &gic_irq_domain_hierarchy_ops; + + if (!of_property_read_u32(node, "arm,routable-irqs", + &nr_routable_irqs)) { + ops = &gic_irq_domain_ops; + gic_irqs = nr_routable_irqs; + } + + gic->domain = irq_domain_add_linear(node, gic_irqs, ops, gic); + } else { /* Non-DT case */ + /* + * For primary GICs, skip over SGIs. + * For secondary GICs, skip over PPIs, too. + */ + if (gic_nr == 0 && (irq_start & 31) > 0) { + hwirq_base = 16; + if (irq_start != -1) + irq_start = (irq_start & ~31) + 16; + } else { + hwirq_base = 32; + } + + gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ - if (IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) && - of_find_property(node, "arm,irq-domain-hierarchy", NULL)) - gic->domain = irq_domain_add_linear(node, gic_irqs, - &gic_irq_domain_hierarchy_ops, gic); - else if (of_property_read_u32(node, "arm,routable-irqs", - &nr_routable_irqs)) { irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id()); if (IS_ERR_VALUE(irq_base)) { @@ -1004,10 +1005,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base, hwirq_base, &gic_irq_domain_ops, gic); - } else { - gic->domain = irq_domain_add_linear(node, nr_routable_irqs, - &gic_irq_domain_ops, - gic); } if (WARN_ON(!gic->domain)) -- 2.0.4