From patchwork Fri Dec 16 16:35:39 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Langsdorf X-Patchwork-Id: 5828 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2038823E01 for ; Fri, 16 Dec 2011 16:37:20 +0000 (UTC) Received: from mail-ey0-f180.google.com (mail-ey0-f180.google.com [209.85.215.180]) by fiordland.canonical.com (Postfix) with ESMTP id 164E5A1850E for ; Fri, 16 Dec 2011 16:37:20 +0000 (UTC) Received: by eaak10 with SMTP id k10so3837956eaa.11 for ; Fri, 16 Dec 2011 08:37:20 -0800 (PST) Received: by 10.205.120.135 with SMTP id fy7mr3230139bkc.54.1324053439874; Fri, 16 Dec 2011 08:37:19 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.204.41.207 with SMTP id p15cs10426bke; Fri, 16 Dec 2011 08:37:19 -0800 (PST) Received: by 10.224.34.17 with SMTP id j17mr13085927qad.22.1324053437366; Fri, 16 Dec 2011 08:37:17 -0800 (PST) Received: from smtp171.iad.emailsrvr.com (smtp171.iad.emailsrvr.com. [207.97.245.171]) by mx.google.com with ESMTPS id hp8si7235170qab.30.2011.12.16.08.37.16 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 16 Dec 2011 08:37:17 -0800 (PST) Received-SPF: pass (google.com: domain of mark.langsdorf@calxeda.com designates 207.97.245.171 as permitted sender) client-ip=207.97.245.171; Authentication-Results: mx.google.com; spf=pass (google.com: domain of mark.langsdorf@calxeda.com designates 207.97.245.171 as permitted sender) smtp.mail=mark.langsdorf@calxeda.com Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp57.relay.iad1a.emailsrvr.com (SMTP Server) with ESMTP id 8A7B2F8695; Fri, 16 Dec 2011 11:37:16 -0500 (EST) X-Virus-Scanned: OK Received: from smtp192.mex02.mlsrvr.com (smtp192.mex02.mlsrvr.com [204.232.137.43]) by smtp57.relay.iad1a.emailsrvr.com (SMTP Server) with ESMTPS id 1CC3CF85FB; Fri, 16 Dec 2011 11:37:16 -0500 (EST) Received: from IAD2MBX09.mex02.mlsrvr.com ([172.23.11.65]) by IAD2HUB07.mex02.mlsrvr.com ([172.23.10.71]) with mapi; Fri, 16 Dec 2011 11:37:14 -0500 From: Mark Langsdorf To: Richard Zhao , "linux-arm-kernel@lists.infradead.org" , "cpufreq@vger.kernel.org" , "devicetree-discuss@lists.ozlabs.org" CC: "linux@arm.linux.org.uk" , "davej@redhat.com" , "kernel@pengutronix.de" , "shawn.guo@linaro.org" , "eric.miao@linaro.org" , "linaro-dev@lists.linaro.org" , "patches@linaro.org" Date: Fri, 16 Dec 2011 11:35:39 -0500 Subject: RE: [PATCH V2 3/4] arm/imx6q: register arm_clk as cpu to clkdev Thread-Topic: [PATCH V2 3/4] arm/imx6q: register arm_clk as cpu to clkdev Thread-Index: Acy73eKnuN0DSlGbRti4BpCXagWKGgAMtyIR Message-ID: <21672683C5A3814BB4DB938EBE482DE40A1AE8EF74@IAD2MBX09.mex02.mlsrvr.com> References: <1324031462-24961-1-git-send-email-richard.zhao@linaro.org>, <1324031462-24961-4-git-send-email-richard.zhao@linaro.org> In-Reply-To: <1324031462-24961-4-git-send-email-richard.zhao@linaro.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US x-tm-as-product-ver: SMEX-10.0.0.4152-6.800.1017-18586.004 x-tm-as-result: No--46.020400-8.000000-31 x-tm-as-user-approved-sender: No x-tm-as-user-blocked-sender: No MIME-Version: 1.0 Is there a portable/generic approach for other drivers that may want to use arm-cpufreq.c? arm_clk is not normally defined for my SoC and I don't see an easy way to pull it in. --Mark Langsdorf Calxeda, Inc. diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 039a7ab..72acbc2 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c @@ -1911,6 +1911,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk), _REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk), _REGISTER_CLOCK(NULL, "sata_clk", sata_clk), + _REGISTER_CLOCK(NULL, "cpu", arm_clk), }; int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)