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[2001:1868:205::9]) by mx.google.com with ESMTPS id r8si9442534pav.187.2016.08.03.09.14.26 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Aug 2016 09:14:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bUynI-000864-1z; Wed, 03 Aug 2016 16:13:20 +0000 Received: from mail-wm0-x234.google.com ([2a00:1450:400c:c09::234]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bUymC-0007gb-SG for linux-arm-kernel@lists.infradead.org; Wed, 03 Aug 2016 16:12:16 +0000 Received: by mail-wm0-x234.google.com with SMTP id o80so343677617wme.1 for ; Wed, 03 Aug 2016 09:11:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0LWzK6lOUVBoUT+hef8SCU16M84iidYYafMOPuVrlgE=; b=HiNLzw7K8SdYtgi84DCz9gDC4E9C9poSwhA1HGB3YZkufxlbs4Q76me64gatsM5He8 Rdqq3McXiaU/0zWGhOp6IH/FnhtJgVfppFxX3neTZt0K1BXKQQRVe8wp7ErqBW/9OhTg 89vu6nuwT5AMMHJkh+vOjbUti8EhTt95LUXE4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0LWzK6lOUVBoUT+hef8SCU16M84iidYYafMOPuVrlgE=; b=D+A+++24NwfqUBsqagMLgl4UQew+aRi5gmCGJWyDMHy7s4J7pDGtsq6WsCsf4wy64R B5dJnaWfgbOA5oEUQd8BQF5QFV2aCe2ENdvPZDrLUKoKEEKsGleo5v0ZIFCQ6ItRvEcB pIA7WnCJ9ldV0DzY6ont57tm8n1er9s+Jh1hnRNz7j/PbDhThUPkyXh6qyotwVZyt9jP YLLFIJqwHQkvtYzBKGtWOsClKjpC5i8ZiAVhAOFPF7UmDIM0FmzdqV2TUGrZLH47SK+q EwNIVkSvbOtJAHRl26fUCvHUwDD5ThTEVSq1wsxjIN2ZFKHDglgxc2vlkztSa3YUcaSz gAaQ== X-Gm-Message-State: AEkoouudwoJNdAqROXrAt0Tf/9P3qtxSESqNQwbQb16xnRbORt7EpW2nyarxs+/ESJl/9i2I X-Received: by 10.194.65.170 with SMTP id y10mr463374wjs.26.1470240711302; Wed, 03 Aug 2016 09:11:51 -0700 (PDT) Received: from localhost.localdomain ([94.18.191.146]) by smtp.gmail.com with ESMTPSA id n131sm27817583wmd.3.2016.08.03.09.11.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 03 Aug 2016 09:11:50 -0700 (PDT) From: Christoffer Dall To: Marc Zyngier , Andre Przywara , kvmarm@lists.cs.columbia.edu Subject: [PATCH 3/3] KVM: arm64: vgic-its: Make updates to propbaser/pendbaser atomic Date: Wed, 3 Aug 2016 18:13:25 +0200 Message-Id: <20160803161325.14933-4-christoffer.dall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160803161325.14933-1-christoffer.dall@linaro.org> References: <20160803161325.14933-1-christoffer.dall@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160803_091213_114729_6D08BEEE X-CRM114-Status: GOOD ( 14.68 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:400c:c09:0:0:0:234 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christoffer Dall , linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org There are two problems with the current implementation of the MMIO handlers for the propbaser and pendbaser: First, the write to the value itself is not guaranteed to be an atomic 64-bit write so two concurrent writes to the structure field could be intermixed. Second, because we do a read-modify-update operation without any synchronization, if we have two 32-bit accesses to separate parts of the register, we can loose one of them. We can take the KVM mutex to synchronize accesses to these registers. Signed-off-by: Christoffer Dall --- virt/kvm/arm/vgic/vgic-mmio-v3.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) -- 2.9.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c index ff668e0..e38b7a0 100644 --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c @@ -306,16 +306,19 @@ static void vgic_mmio_write_propbase(struct kvm_vcpu *vcpu, { struct vgic_dist *dist = &vcpu->kvm->arch.vgic; struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; - u64 propbaser = dist->propbaser; + u64 propbaser; /* Storing a value with LPIs already enabled is undefined */ if (vgic_cpu->lpis_enabled) return; + mutex_lock(&vcpu->kvm->lock); + propbaser = dist->propbaser; propbaser = update_64bit_reg(propbaser, addr & 4, len, val); propbaser = vgic_sanitise_propbaser(propbaser); dist->propbaser = propbaser; + mutex_unlock(&vcpu->kvm->lock); } static unsigned long vgic_mmio_read_pendbase(struct kvm_vcpu *vcpu, @@ -331,16 +334,19 @@ static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu, unsigned long val) { struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; - u64 pendbaser = vgic_cpu->pendbaser; + u64 pendbaser; /* Storing a value with LPIs already enabled is undefined */ if (vgic_cpu->lpis_enabled) return; + mutex_lock(&vcpu->kvm->lock); + pendbaser = vgic_cpu->pendbaser; pendbaser = update_64bit_reg(pendbaser, addr & 4, len, val); pendbaser = vgic_sanitise_pendbaser(pendbaser); vgic_cpu->pendbaser = pendbaser; + mutex_unlock(&vcpu->kvm->lock); } /*