From patchwork Wed Apr 29 06:04:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 47702 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f197.google.com (mail-wi0-f197.google.com [209.85.212.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 3E38B2121F for ; Wed, 29 Apr 2015 06:09:45 +0000 (UTC) Received: by wixv7 with SMTP id v7sf11477639wix.0 for ; Tue, 28 Apr 2015 23:09:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:date:from:to:subject:message-id :references:mime-version:content-disposition:in-reply-to:user-agent :cc:precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:content-type:content-transfer-encoding :sender:errors-to:x-original-sender :x-original-authentication-results:mailing-list; bh=Pfl/xDuT174QXXzKwsZ+33kPYSID5CODB/JjGBlzq50=; b=mBawauy0fjxGRp4JBRG5o7cuMI6fy1zo8hvPpfuRJfkpYVRvZ3ls73IN9orBERPtCD SVMMy8qdQI5MUqWmwn/NvRN5xmnExyeM4v6QwkIofp0IZckiMYsapEZP+IgivS8U74s1 mptnmDku+z97rA0EuXhn/WUvt26pqCI4PnRdRHoZQbN3tgq+ZD0JwsYlrwrnfd436BPp NHsYAO7yAhZaRc5m1lz2zKQRh0wHlkFlpNZrZ0t42+Gcb2UK93QpTbpOJRmR+JoXWFaU NAxNN0FQVBRFUsDA854QxXbNU0JTgWimUtVUAh9dBXG5fw9vSab9Yqov8i8myFbpYe6a h/oA== X-Gm-Message-State: ALoCoQnv/NUZNMmvca8iu63cJnJFqHey4qKLMFmE+BJanvZYHiFymIPdRmjU0fjIKbN8iIVwEIUf X-Received: by 10.112.93.203 with SMTP id cw11mr12226751lbb.0.1430287784498; Tue, 28 Apr 2015 23:09:44 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.205.70 with SMTP id le6ls179909lac.50.gmail; Tue, 28 Apr 2015 23:09:44 -0700 (PDT) X-Received: by 10.152.5.194 with SMTP id u2mr261607lau.3.1430287784347; Tue, 28 Apr 2015 23:09:44 -0700 (PDT) Received: from mail-la0-f54.google.com (mail-la0-f54.google.com. [209.85.215.54]) by mx.google.com with ESMTPS id wz10si18638401lbb.138.2015.04.28.23.09.44 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Apr 2015 23:09:44 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) client-ip=209.85.215.54; Received: by lagv1 with SMTP id v1so12334545lag.3 for ; Tue, 28 Apr 2015 23:09:44 -0700 (PDT) X-Received: by 10.152.4.137 with SMTP id k9mr17350832lak.29.1430287784187; Tue, 28 Apr 2015 23:09:44 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.67.65 with SMTP id l1csp2305246lbt; Tue, 28 Apr 2015 23:09:43 -0700 (PDT) X-Received: by 10.66.139.109 with SMTP id qx13mr38736188pab.110.1430287782111; Tue, 28 Apr 2015 23:09:42 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id pc5si37979727pac.85.2015.04.28.23.09.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Apr 2015 23:09:42 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YnL9m-0002p7-OR; Wed, 29 Apr 2015 06:07:38 +0000 Received: from mail-pa0-f41.google.com ([209.85.220.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YnL9h-0002kK-W1 for linux-arm-kernel@lists.infradead.org; Wed, 29 Apr 2015 06:07:34 +0000 Received: by pabtp1 with SMTP id tp1so18373836pab.2 for ; Tue, 28 Apr 2015 23:07:11 -0700 (PDT) X-Received: by 10.68.190.131 with SMTP id gq3mr14542092pbc.113.1430287631216; Tue, 28 Apr 2015 23:07:11 -0700 (PDT) Received: from dragon ([104.207.83.1]) by mx.google.com with ESMTPSA id xm7sm24330077pac.28.2015.04.28.23.07.08 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 28 Apr 2015 23:07:10 -0700 (PDT) Date: Wed, 29 Apr 2015 14:04:58 +0800 From: Shawn Guo To: Kevin Hilman Subject: Re: [PATCH 05/11] ARM: imx6: set initial power mode in pm function Message-ID: <20150429060446.GA27573@dragon> References: <1430058672-9267-1-git-send-email-shawn.guo@linaro.org> <1430058672-9267-6-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150428_230734_094276_D262281E X-CRM114-Status: GOOD ( 28.89 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.41 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.220.41 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Mike Turquette , Arnd Bergmann , Tyler Baker , Stephen Boyd , Russell King , Sascha Hauer , Olof Johansson , Frank Li , "linux-arm-kernel@lists.infradead.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: shawn.guo@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Hi Kevin, On Tue, Apr 28, 2015 at 11:42:48AM -0700, Kevin Hilman wrote: > Hi Shawn, > > On Sun, Apr 26, 2015 at 7:31 AM, Shawn Guo wrote: > > Rather than setting initial low-power mode in every single i.MX6 clock > > initialization function, we should really do that in pm code. Let's > > move imx6q_set_lpm(WAIT_CLOCKED) call into imx6_pm_common_init(). > > > > While at it, let's rename the function to imx6_set_lpm() since it's > > actually common for all i.MX6 SoCs. > > > > Signed-off-by: Shawn Guo > > Some boot failures on imx6[1] (multi_v7_defconfig) were bisected down > to this patch. A simple revert doesn't build, so I was unable tot > test a direct revert. However, from the boot failures you can see > that while multi_v7_defconfig boots fail, the imx_v6_v7_defconfig > boots fine. This reminds me that cpuidle support is not turned on in imx_v6_v7_defconfig. I will send a patch to enable it for testing coverage. > Disabling CONFIG_CPU_IDLE in multi_v7_defconfig allows > this to start booting again on my wandboard quad, so I think there is > something wrong with the cpuidle changes. I just tracked down the issue, and sent a fix like below. The kernelci.org boot automation farm helps. Thanks. Shawn ----8<------------------------------- >From 056a5da1b56a057762eccd52b5b6b920c7f56b14 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 29 Apr 2015 13:07:03 +0800 Subject: [PATCH] ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function") moves imx6_set_lpm() from clock init function into imx6_pm_common_init(). This causes a hang when cpuidle support is enabled. The reason for that is ARM core clock is shut down unexpectedly by WAIT mode. It happens with the following call stack: cpuidle_register_governor() cpuidle_switch_governor() cpuidle_uninstall_idle_handler() synchronize_sched() wait_rcu_gp() wait_for_completion() When wait_for_completion() is called as above, all cores are idle/WFI. Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a hardware shutdown of the ARM core clock. To fix the regression, we need to ensure that CCM_CLPCR_LPM is initialized into RUN mode earlier than cpuidle governor registration, which is a postcore_initcall. This patch creates function imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into RUN mode, and have the function called from machine .init_irq hook, which should be early enough. Reported-by: Kevin Hilman Fixes: 4631960d26da ("ARM: imx6: set initial power mode in pm function") Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/mach-imx6q.c | 1 + arch/arm/mach-imx/mach-imx6sl.c | 1 + arch/arm/mach-imx/mach-imx6sx.c | 1 + arch/arm/mach-imx/pm-imx6.c | 28 ++++++++++++++++++---------- 5 files changed, 22 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index d1e2873f807e..fbd86f1b7f3b 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -123,6 +123,7 @@ static inline void v7_cpu_resume(void) {} static inline void imx6_suspend(void __iomem *ocram_vbase) {} #endif +void imx6_pm_ccm_init(const char *ccm_compat); void imx6q_pm_init(void); void imx6dl_pm_init(void); void imx6sl_pm_init(void); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 3ab61549ce0f..9602cc12d2f1 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -393,6 +393,7 @@ static void __init imx6q_init_irq(void) imx_init_l2cache(); imx_src_init(); irqchip_init(); + imx6_pm_ccm_init("fsl,imx6q-ccm"); } static const char * const imx6q_dt_compat[] __initconst = { diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index 12a1b098fc6a..300326373166 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -66,6 +66,7 @@ static void __init imx6sl_init_irq(void) imx_init_l2cache(); imx_src_init(); irqchip_init(); + imx6_pm_ccm_init("fsl,imx6sl-ccm"); } static const char * const imx6sl_dt_compat[] __initconst = { diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c index f17b7004c24b..6a0b0614de29 100644 --- a/arch/arm/mach-imx/mach-imx6sx.c +++ b/arch/arm/mach-imx/mach-imx6sx.c @@ -86,6 +86,7 @@ static void __init imx6sx_init_irq(void) imx_init_l2cache(); imx_src_init(); irqchip_init(); + imx6_pm_ccm_init("fsl,imx6sx-ccm"); } static void __init imx6sx_init_late(void) diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index 27bc80dab2d8..b01650d94f91 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -89,7 +89,6 @@ struct imx6_pm_base { struct imx6_pm_socdata { u32 ddr_type; - const char *ccm_compat; const char *mmdc_compat; const char *src_compat; const char *iomuxc_compat; @@ -139,7 +138,6 @@ static const u32 imx6sx_mmdc_io_offset[] __initconst = { }; static const struct imx6_pm_socdata imx6q_pm_data __initconst = { - .ccm_compat = "fsl,imx6q-ccm", .mmdc_compat = "fsl,imx6q-mmdc", .src_compat = "fsl,imx6q-src", .iomuxc_compat = "fsl,imx6q-iomuxc", @@ -149,7 +147,6 @@ static const struct imx6_pm_socdata imx6q_pm_data __initconst = { }; static const struct imx6_pm_socdata imx6dl_pm_data __initconst = { - .ccm_compat = "fsl,imx6q-ccm", .mmdc_compat = "fsl,imx6q-mmdc", .src_compat = "fsl,imx6q-src", .iomuxc_compat = "fsl,imx6dl-iomuxc", @@ -159,7 +156,6 @@ static const struct imx6_pm_socdata imx6dl_pm_data __initconst = { }; static const struct imx6_pm_socdata imx6sl_pm_data __initconst = { - .ccm_compat = "fsl,imx6sl-ccm", .mmdc_compat = "fsl,imx6sl-mmdc", .src_compat = "fsl,imx6sl-src", .iomuxc_compat = "fsl,imx6sl-iomuxc", @@ -169,7 +165,6 @@ static const struct imx6_pm_socdata imx6sl_pm_data __initconst = { }; static const struct imx6_pm_socdata imx6sx_pm_data __initconst = { - .ccm_compat = "fsl,imx6sx-ccm", .mmdc_compat = "fsl,imx6sx-mmdc", .src_compat = "fsl,imx6sx-src", .iomuxc_compat = "fsl,imx6sx-iomuxc", @@ -553,16 +548,11 @@ put_node: static void __init imx6_pm_common_init(const struct imx6_pm_socdata *socdata) { - struct device_node *np; struct regmap *gpr; int ret; - np = of_find_compatible_node(NULL, NULL, socdata->ccm_compat); - ccm_base = of_iomap(np, 0); WARN_ON(!ccm_base); - imx6_set_lpm(WAIT_CLOCKED); - if (IS_ENABLED(CONFIG_SUSPEND)) { ret = imx6q_suspend_init(socdata); if (ret) @@ -583,6 +573,24 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata IMX6Q_GPR1_GINT); } +void __init imx6_pm_ccm_init(const char *ccm_compat) +{ + struct device_node *np; + u32 val; + + np = of_find_compatible_node(NULL, NULL, ccm_compat); + ccm_base = of_iomap(np, 0); + BUG_ON(!ccm_base); + + /* + * Initialize CCM_CLPCR_LPM into RUN mode to avoid ARM core + * clock being shut down unexpectedly by WAIT mode. + */ + val = readl_relaxed(ccm_base + CLPCR); + val &= ~BM_CLPCR_LPM; + writel_relaxed(val, ccm_base + CLPCR); +} + void __init imx6q_pm_init(void) { imx6_pm_common_init(&imx6q_pm_data);